Christopher L Chin
Examiner (ID: 18108)
Most Active Art Unit | 1677 |
Art Unit(s) | 1677, 1621, 1802, 2899, 1641 |
Total Applications | 1906 |
Issued Applications | 1343 |
Pending Applications | 250 |
Abandoned Applications | 291 |
Applications
Application number | Title of the application | Filing Date | Status |
---|---|---|---|
Array
(
[id] => 18821918
[patent_doc_number] => 20230396259
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => PHASE-LOCKED LOOP (PLL) WITH DIRECT FEEDFORWARD CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/452196
[patent_app_country] => US
[patent_app_date] => 2023-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4721
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18452196
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/452196 | PHASE-LOCKED LOOP (PLL) WITH DIRECT FEEDFORWARD CIRCUIT | Aug 17, 2023 | Pending |
Array
(
[id] => 18813551
[patent_doc_number] => 20230387888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-11-30
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/448285
[patent_app_country] => US
[patent_app_date] => 2023-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 56979
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18448285
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/448285 | Semiconductor device | Aug 10, 2023 | Issued |
Array
(
[id] => 19356979
[patent_doc_number] => 12057436
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-06
[patent_title] => Package comprising an integrated device configured for shareable power resource
[patent_app_type] => utility
[patent_app_number] => 18/365063
[patent_app_country] => US
[patent_app_date] => 2023-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 14
[patent_no_of_words] => 11057
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18365063
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/365063 | Package comprising an integrated device configured for shareable power resource | Aug 2, 2023 | Issued |
Array
(
[id] => 18821907
[patent_doc_number] => 20230396248
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-07
[patent_title] => BIAS CURRENT RECEIVER WITH SELECTIVE COUPLING CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 18/336621
[patent_app_country] => US
[patent_app_date] => 2023-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15570
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18336621
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/336621 | Bias current receiver with selective coupling circuit | Jun 15, 2023 | Issued |
Array
(
[id] => 18713536
[patent_doc_number] => 20230336172
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-19
[patent_title] => TRANSISTOR SWITCHING BASED ON VOLTAGE SENSING
[patent_app_type] => utility
[patent_app_number] => 18/208345
[patent_app_country] => US
[patent_app_date] => 2023-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16280
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18208345
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/208345 | TRANSISTOR SWITCHING BASED ON VOLTAGE SENSING | Jun 11, 2023 | Pending |
Array
(
[id] => 18613655
[patent_doc_number] => 20230280391
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-07
[patent_title] => GAN RELIABILITY BUILT-IN SELF TEST (BIST) APPARATUS AND METHOD FOR QUALIFYING DYNAMIC ON-STATE RESISTANCE DEGRADATION
[patent_app_type] => utility
[patent_app_number] => 18/196380
[patent_app_country] => US
[patent_app_date] => 2023-05-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6871
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18196380
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/196380 | GAN RELIABILITY BUILT-IN SELF TEST (BIST) APPARATUS AND METHOD FOR QUALIFYING DYNAMIC ON-STATE RESISTANCE DEGRADATION | May 10, 2023 | Pending |
Array
(
[id] => 18515272
[patent_doc_number] => 20230231554
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-20
[patent_title] => METHOD OF OPERATING DECOUPLING SYSTEM, AND METHOD OF FABRICATING SAME
[patent_app_type] => utility
[patent_app_number] => 18/182831
[patent_app_country] => US
[patent_app_date] => 2023-03-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15073
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 72
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18182831
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/182831 | METHOD OF OPERATING DECOUPLING SYSTEM, AND METHOD OF FABRICATING SAME | Mar 12, 2023 | Pending |
Array
(
[id] => 18767435
[patent_doc_number] => 11817852
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2023-11-14
[patent_title] => Anti-backflow output switch
[patent_app_type] => utility
[patent_app_number] => 18/179671
[patent_app_country] => US
[patent_app_date] => 2023-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1488
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 403
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18179671
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/179671 | Anti-backflow output switch | Mar 6, 2023 | Issued |
Array
(
[id] => 18489048
[patent_doc_number] => 20230216398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-06
[patent_title] => REGULATED VOLTAGE SYSTEMS AND METHODS USING INTRINSICALLY VARIED PROCESS CHARACTERISTICS
[patent_app_type] => utility
[patent_app_number] => 18/113501
[patent_app_country] => US
[patent_app_date] => 2023-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5480
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18113501
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/113501 | Regulated voltage systems and methods using intrinsically varied process characteristics | Feb 22, 2023 | Issued |
Array
(
[id] => 18858022
[patent_doc_number] => 11855620
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-12-26
[patent_title] => Multiplexing circuit, output stage, and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 18/163295
[patent_app_country] => US
[patent_app_date] => 2023-02-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5691
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18163295
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/163295 | Multiplexing circuit, output stage, and semiconductor device | Feb 1, 2023 | Issued |
Array
(
[id] => 18919555
[patent_doc_number] => 11881851
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-01-23
[patent_title] => Multiplexing sample-and-hold circuit
[patent_app_type] => utility
[patent_app_number] => 18/155961
[patent_app_country] => US
[patent_app_date] => 2023-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 6701
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155961
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/155961 | Multiplexing sample-and-hold circuit | Jan 17, 2023 | Issued |
Array
(
[id] => 18380494
[patent_doc_number] => 20230155584
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-18
[patent_title] => ELECTRICAL SWITCHING SYSTEMS INCLUDING CONSTANT-POWER CONTROLLERS AND ASSOCIATED METHODS
[patent_app_type] => utility
[patent_app_number] => 18/094809
[patent_app_country] => US
[patent_app_date] => 2023-01-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5920
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18094809
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/094809 | Electrical switching systems including constant-power controllers and associated methods | Jan 8, 2023 | Issued |
Array
(
[id] => 18351263
[patent_doc_number] => 20230139374
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-04
[patent_title] => SWITCHING CIRCUIT, GATE DRIVER FOR A GROUP III NITRIDE-BASED ENHANCEMENT MODE TRANSISTOR DEVICE AND METHOD OF OPERATING THE GROUP III NITRIDE-BASED ENHANCEMENT MODE TRANSISTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/090555
[patent_app_country] => US
[patent_app_date] => 2022-12-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18504
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090555
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/090555 | SWITCHING CIRCUIT, GATE DRIVER FOR A GROUP III NITRIDE-BASED ENHANCEMENT MODE TRANSISTOR DEVICE AND METHOD OF OPERATING THE GROUP III NITRIDE-BASED ENHANCEMENT MODE TRANSISTOR DEVICE | Dec 28, 2022 | Abandoned |
Array
(
[id] => 18395535
[patent_doc_number] => 20230163756
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-25
[patent_title] => SWITCH CIRCUIT AND ELECTRIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/089657
[patent_app_country] => US
[patent_app_date] => 2022-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5092
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 232
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18089657
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/089657 | SWITCH CIRCUIT AND ELECTRIC DEVICE | Dec 27, 2022 | Pending |
Array
(
[id] => 19094491
[patent_doc_number] => 11955962
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-04-09
[patent_title] => Arrangements of non-dissipative elements in non-dissipative element-enabled capacitive element drivers
[patent_app_type] => utility
[patent_app_number] => 18/090469
[patent_app_country] => US
[patent_app_date] => 2022-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 54
[patent_figures_cnt] => 79
[patent_no_of_words] => 49873
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18090469
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/090469 | Arrangements of non-dissipative elements in non-dissipative element-enabled capacitive element drivers | Dec 27, 2022 | Issued |
Array
(
[id] => 18308252
[patent_doc_number] => 20230112152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => CIRCUITS AND METHODS FOR CONTROLLING A VOLTAGE OF A SEMICONDUCTOR SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 18/064185
[patent_app_country] => US
[patent_app_date] => 2022-12-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 21046
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18064185
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/064185 | Circuits and methods for controlling a voltage of a semiconductor substrate | Dec 8, 2022 | Issued |
Array
(
[id] => 19415365
[patent_doc_number] => 12081209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-03
[patent_title] => Channel circuit and electronic device
[patent_app_type] => utility
[patent_app_number] => 17/985492
[patent_app_country] => US
[patent_app_date] => 2022-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 4775
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17985492
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/985492 | Channel circuit and electronic device | Nov 10, 2022 | Issued |
Array
(
[id] => 18408773
[patent_doc_number] => 20230170126
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => TRANSFORMER
[patent_app_type] => utility
[patent_app_number] => 18/054217
[patent_app_country] => US
[patent_app_date] => 2022-11-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3172
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18054217
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/054217 | TRANSFORMER | Nov 9, 2022 | Pending |
Array
(
[id] => 18308348
[patent_doc_number] => 20230112248
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => SYSTEM FOR A SHOE SOLE, METHOD FOR OPERATING THE SYSTEM, A SHOE SOLE, AND A SHOE
[patent_app_type] => utility
[patent_app_number] => 17/938818
[patent_app_country] => US
[patent_app_date] => 2022-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8503
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938818
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/938818 | SYSTEM FOR A SHOE SOLE, METHOD FOR OPERATING THE SYSTEM, A SHOE SOLE, AND A SHOE | Oct 6, 2022 | Pending |
Array
(
[id] => 18935372
[patent_doc_number] => 11887813
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-30
[patent_title] => Pulsed voltage source for plasma processing
[patent_app_type] => utility
[patent_app_number] => 17/961452
[patent_app_country] => US
[patent_app_date] => 2022-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 6795
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 168
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17961452
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/961452 | Pulsed voltage source for plasma processing | Oct 5, 2022 | Issued |