Search

Christopher L. Parry

Supervisory Patent Examiner (ID: 15599, Phone: (571)272-8328 , Office: P/2451 )

Most Active Art Unit
2421
Art Unit(s)
2614, 2421, 2623, 2451
Total Applications
300
Issued Applications
155
Pending Applications
5
Abandoned Applications
140

Applications

Application numberTitle of the applicationFiling DateStatus
19/142724 SERVER BOOT AND OPERATION METHOD AND APPARATUS, SERVER, AND STORAGE MEDIUM Jun 23, 2025 Pending
Array ( [id] => 19558481 [patent_doc_number] => 20240370273 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => MULTI-SOCKET COMPUTING SYSTEM EMPLOYING A PARALLELIZED BOOT ARCHITECTURE WITH PARTIALLY CONCURRENT PROCESSOR BOOT-UP OPERATIONS, AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/773245 [patent_app_country] => US [patent_app_date] => 2024-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10149 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18773245 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/773245
MULTI-SOCKET COMPUTING SYSTEM EMPLOYING A PARALLELIZED BOOT ARCHITECTURE WITH PARTIALLY CONCURRENT PROCESSOR BOOT-UP OPERATIONS, AND RELATED METHODS Jul 14, 2024 Pending
Array ( [id] => 19530012 [patent_doc_number] => 20240353914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => BANK CONFIGURABLE POWER MODES [patent_app_type] => utility [patent_app_number] => 18/762482 [patent_app_country] => US [patent_app_date] => 2024-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26787 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18762482 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/762482
Bank configurable power modes Jul 1, 2024 Issued
18/720804 SELECTIVE BOOT CYCLE MODES Jun 16, 2024 Pending
Array ( [id] => 20421801 [patent_doc_number] => 20250383886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-12-18 [patent_title] => SUPERVISED EXECUTION OF SOFTWARE APPLICATIONS ON VEHICLE COMPUTING DEVICES [patent_app_type] => utility [patent_app_number] => 18/744049 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12864 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744049 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744049
SUPERVISED EXECUTION OF SOFTWARE APPLICATIONS ON VEHICLE COMPUTING DEVICES Jun 13, 2024 Pending
Array ( [id] => 19686240 [patent_doc_number] => 20250004785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-02 [patent_title] => BOOT PROGRAM SELECTION METHOD [patent_app_type] => utility [patent_app_number] => 18/742726 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3138 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742726 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742726
BOOT PROGRAM SELECTION METHOD Jun 12, 2024 Pending
Array ( [id] => 20312697 [patent_doc_number] => 20250330326 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => METHODS, DEVICES, AND COMPUTER PROGRAM PRODUCTS FOR VERIFYING IOT DEVICE [patent_app_type] => utility [patent_app_number] => 18/679602 [patent_app_country] => US [patent_app_date] => 2024-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18679602 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/679602
METHODS, DEVICES, AND COMPUTER PROGRAM PRODUCTS FOR VERIFYING IOT DEVICE May 30, 2024 Pending
Array ( [id] => 20380442 [patent_doc_number] => 20250362935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-27 [patent_title] => GENERATING CONSOLIDATED CUSTOMER INFORMATION QUESTIONNAIRE FOR DEPLOYMENT OF DISTRIBUTED TELCO CLOUD [patent_app_type] => utility [patent_app_number] => 18/669951 [patent_app_country] => US [patent_app_date] => 2024-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9819 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18669951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/669951
GENERATING CONSOLIDATED CUSTOMER INFORMATION QUESTIONNAIRE FOR DEPLOYMENT OF DISTRIBUTED TELCO CLOUD May 20, 2024 Pending
Array ( [id] => 19436782 [patent_doc_number] => 20240305280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => SYNCHRONIZATION IN A QUANTUM CONTROLLER WITH MODULAR AND DYNAMIC PULSE GENERATION AND ROUTING [patent_app_type] => utility [patent_app_number] => 18/668918 [patent_app_country] => US [patent_app_date] => 2024-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13789 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18668918 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/668918
SYNCHRONIZATION IN A QUANTUM CONTROLLER WITH MODULAR AND DYNAMIC PULSE GENERATION AND ROUTING May 19, 2024 Pending
Array ( [id] => 19420107 [patent_doc_number] => 20240296230 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => Secure Boot Partition For Cloud Compute Nodes [patent_app_type] => utility [patent_app_number] => 18/662359 [patent_app_country] => US [patent_app_date] => 2024-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18662359 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/662359
Secure Boot Partition For Cloud Compute Nodes May 12, 2024 Pending
Array ( [id] => 19660346 [patent_doc_number] => 20240427411 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => HIERARCHICAL POWER ESTIMATION AND THROTTLING IN A PROCESSOR-BASED SYSTEM IN AN INTEGRATED CIRCUIT (IC) CHIP [patent_app_type] => utility [patent_app_number] => 18/626645 [patent_app_country] => US [patent_app_date] => 2024-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18626645 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/626645
HIERARCHICAL POWER ESTIMATION AND THROTTLING IN A PROCESSOR-BASED SYSTEM IN AN INTEGRATED CIRCUIT (IC) CHIP Apr 3, 2024 Pending
Array ( [id] => 20290025 [patent_doc_number] => 20250315268 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-09 [patent_title] => BOOTTIME HOTKEYS IN A HETEROGENEOUS COMPUTING PLATFORM [patent_app_type] => utility [patent_app_number] => 18/625344 [patent_app_country] => US [patent_app_date] => 2024-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18625344 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/625344
Boottime hotkeys in a heterogeneous computing platform Apr 2, 2024 Issued
Array ( [id] => 19660304 [patent_doc_number] => 20240427369 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => ADAPTIVE LOCAL THROTTLE MANAGEMENT OF PROCESSING CIRCUITS BASED ON DETECTED STATES IN AN INTEGRATED CIRCUIT (IC) CHIP [patent_app_type] => utility [patent_app_number] => 18/623192 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28943 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623192 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623192
ADAPTIVE LOCAL THROTTLE MANAGEMENT OF PROCESSING CIRCUITS BASED ON DETECTED STATES IN AN INTEGRATED CIRCUIT (IC) CHIP Mar 31, 2024 Pending
Array ( [id] => 20282164 [patent_doc_number] => 20250307406 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => OPERATING SYSTEM DISCOVERY OF, AND INTERACTION WITH, FIRMWARE FRAMEWORK DEVICES [patent_app_type] => utility [patent_app_number] => 18/619546 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11261 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619546 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619546
OPERATING SYSTEM DISCOVERY OF, AND INTERACTION WITH, FIRMWARE FRAMEWORK DEVICES Mar 27, 2024 Pending
Array ( [id] => 20281710 [patent_doc_number] => 20250306952 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => INTERFACE MANAGEMENT FOR PERIPHERAL DEVICES [patent_app_type] => utility [patent_app_number] => 18/618336 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3294 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618336 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/618336
Interface management for peripheral devices Mar 26, 2024 Issued
Array ( [id] => 20074024 [patent_doc_number] => 20250212246 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-26 [patent_title] => Power Management for Ambient Power Devices [patent_app_type] => utility [patent_app_number] => 18/597892 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9394 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597892 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/597892
Power Management for Ambient Power Devices Mar 5, 2024 Pending
Array ( [id] => 19235558 [patent_doc_number] => 20240192752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => SYSTEM ON CHIP FOR SUPPLYING A VOLTAGE [patent_app_type] => utility [patent_app_number] => 18/584309 [patent_app_country] => US [patent_app_date] => 2024-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10873 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18584309 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/584309
SYSTEM ON CHIP FOR SUPPLYING A VOLTAGE Feb 21, 2024 Pending
Array ( [id] => 19391389 [patent_doc_number] => 20240281259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => DYNAMICALLY UPDATING A BOOT REGION TABLE TO INCREASE READ SPEED DURING BOOT UP [patent_app_type] => utility [patent_app_number] => 18/439387 [patent_app_country] => US [patent_app_date] => 2024-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439387 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/439387
DYNAMICALLY UPDATING A BOOT REGION TABLE TO INCREASE READ SPEED DURING BOOT UP Feb 11, 2024 Pending
Array ( [id] => 20152347 [patent_doc_number] => 20250252185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-07 [patent_title] => Processor Environment Context Aware Information Handling System Operating Mode Management [patent_app_type] => utility [patent_app_number] => 18/429583 [patent_app_country] => US [patent_app_date] => 2024-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4505 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429583 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429583
Processor Environment Context Aware Information Handling System Operating Mode Management Jan 31, 2024 Pending
Array ( [id] => 20137974 [patent_doc_number] => 20250245018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => Multi-Processing Unit Type Adaptive Memory Diagnostic Acceleration [patent_app_type] => utility [patent_app_number] => 18/429077 [patent_app_country] => US [patent_app_date] => 2024-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18429077 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/429077
Multi-Processing Unit Type Adaptive Memory Diagnostic Acceleration Jan 30, 2024 Pending
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