Search

Christopher L. Parry

Supervisory Patent Examiner (ID: 15599, Phone: (571)272-8328 , Office: P/2451 )

Most Active Art Unit
2421
Art Unit(s)
2614, 2421, 2623, 2451
Total Applications
300
Issued Applications
155
Pending Applications
5
Abandoned Applications
140

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14378673 [patent_doc_number] => 20190163249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => METHOD AND APPARATUS FOR INITIALIZING A POWER DISTRIBUTION CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/174331 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174331 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174331
Method and apparatus for initializing a power distribution circuit Oct 29, 2018 Issued
Array ( [id] => 14378671 [patent_doc_number] => 20190163248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => METHOD AND APPARATUS FOR INITIALIZING A POWER DISTRIBUTION CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/174325 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8548 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16174325 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/174325
Method and apparatus for initializing a power distribution circuit Oct 29, 2018 Issued
Array ( [id] => 16772473 [patent_doc_number] => 10983577 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Method and apparatus to provide dynamic regulation of power assist unit output based on active profile [patent_app_type] => utility [patent_app_number] => 16/175820 [patent_app_country] => US [patent_app_date] => 2018-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11642 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16175820 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/175820
Method and apparatus to provide dynamic regulation of power assist unit output based on active profile Oct 29, 2018 Issued
Array ( [id] => 15714379 [patent_doc_number] => 20200103956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => HYBRID LOW POWER ARCHITECTURE FOR CPU PRIVATE CACHES [patent_app_type] => utility [patent_app_number] => 16/146153 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146153
HYBRID LOW POWER ARCHITECTURE FOR CPU PRIVATE CACHES Sep 27, 2018 Abandoned
Array ( [id] => 17572615 [patent_doc_number] => 11320883 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-05-03 [patent_title] => Multi-die stacks with power management [patent_app_type] => utility [patent_app_number] => 16/146463 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10269 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146463
Multi-die stacks with power management Sep 27, 2018 Issued
Array ( [id] => 13933437 [patent_doc_number] => 20190050234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => AUTOMATED PREBOOT PERFORMANCE MEASUREMENT [patent_app_type] => utility [patent_app_number] => 16/146145 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12475 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146145 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146145
Automated preboot performance measurement Sep 27, 2018 Issued
Array ( [id] => 13905483 [patent_doc_number] => 20190041946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => Techniques For Adjusting A Clock Frequency To Change A Power State of Logic Circuits [patent_app_type] => utility [patent_app_number] => 16/145808 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8246 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16145808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/145808
Techniques For Adjusting A Clock Frequency To Change A Power State of Logic Circuits Sep 27, 2018 Abandoned
Array ( [id] => 13905515 [patent_doc_number] => 20190041962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => PER-CORE OPERATING VOLTAGE AND/OR OPERATING FREQUENCY DETERMINATION BASED ON EFFECTIVE CORE UTILIZATION [patent_app_type] => utility [patent_app_number] => 16/147285 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16147285 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/147285
Per-core operating voltage and/or operating frequency determination based on effective core utilization Sep 27, 2018 Issued
Array ( [id] => 13936253 [patent_doc_number] => 20190051642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => MULTI-DIE PACKAGES WITH EFFICIENT MEMORY STORAGE [patent_app_type] => utility [patent_app_number] => 16/146445 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10180 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146445 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146445
Multi-die packages with efficient memory storage Sep 27, 2018 Issued
Array ( [id] => 15719325 [patent_doc_number] => 20200106430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => DUTY CYCLE CORRECTION SYSTEM AND LOW DROPOUT (LDO) REGULATOR BASED DELAY-LOCKED LOOP (DLL) [patent_app_type] => utility [patent_app_number] => 16/144949 [patent_app_country] => US [patent_app_date] => 2018-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16144949 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/144949
Duty cycle correction system and low dropout (LDO) regulator based delay-locked loop (DLL) Sep 26, 2018 Issued
Array ( [id] => 15622211 [patent_doc_number] => 20200081510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => MANAGING DC POWER [patent_app_type] => utility [patent_app_number] => 16/127040 [patent_app_country] => US [patent_app_date] => 2018-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8100 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16127040 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/127040
Managing DC power Sep 9, 2018 Issued
Array ( [id] => 14313737 [patent_doc_number] => 20190146572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-16 [patent_title] => STORAGE SYSTEM WITH POWER SAVING FUNCTION [patent_app_type] => utility [patent_app_number] => 16/125589 [patent_app_country] => US [patent_app_date] => 2018-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12542 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16125589 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/125589
STORAGE SYSTEM WITH POWER SAVING FUNCTION Sep 6, 2018 Abandoned
Array ( [id] => 14281593 [patent_doc_number] => 20190138081 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => Method for Managing Central Processing Unit and Related Products [patent_app_type] => utility [patent_app_number] => 16/122400 [patent_app_country] => US [patent_app_date] => 2018-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10402 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16122400 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/122400
Method for Managing Central Processing Unit and Related Products Sep 4, 2018 Abandoned
Array ( [id] => 14188513 [patent_doc_number] => 20190113962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => SEMICONDUCTOR DEVICE, ELECTRIC POWER CONTROL SYSTEM, AND ELECTRIC POWER CONTROL METHOD [patent_app_type] => utility [patent_app_number] => 16/059924 [patent_app_country] => US [patent_app_date] => 2018-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8424 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16059924 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/059924
Semiconductor device, electric power control system, and electric power control method Aug 8, 2018 Issued
Array ( [id] => 13737697 [patent_doc_number] => 20180373317 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-27 [patent_title] => TERMINAL CONTROL METHOD AND TERMINAL [patent_app_type] => utility [patent_app_number] => 16/047673 [patent_app_country] => US [patent_app_date] => 2018-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10092 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16047673 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/047673
Terminal control method and terminal Jul 26, 2018 Issued
Array ( [id] => 16477850 [patent_doc_number] => 10852795 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Method for system power management and computing system thereof [patent_app_type] => utility [patent_app_number] => 16/046987 [patent_app_country] => US [patent_app_date] => 2018-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6828 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 437 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16046987 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/046987
Method for system power management and computing system thereof Jul 25, 2018 Issued
Array ( [id] => 16705944 [patent_doc_number] => 10955872 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => System and method to retain baseboard management controller real-time clock time during BMC reboot [patent_app_type] => utility [patent_app_number] => 16/044894 [patent_app_country] => US [patent_app_date] => 2018-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3724 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16044894 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/044894
System and method to retain baseboard management controller real-time clock time during BMC reboot Jul 24, 2018 Issued
Array ( [id] => 17422867 [patent_doc_number] => 11256321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-02-22 [patent_title] => Network-driven, packet context-aware power management for client-server architecture [patent_app_type] => utility [patent_app_number] => 16/024290 [patent_app_country] => US [patent_app_date] => 2018-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 6906 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16024290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/024290
Network-driven, packet context-aware power management for client-server architecture Jun 28, 2018 Issued
Array ( [id] => 18316415 [patent_doc_number] => 11630496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-04-18 [patent_title] => Distributed computing device power [patent_app_type] => utility [patent_app_number] => 16/022049 [patent_app_country] => US [patent_app_date] => 2018-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8042 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16022049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/022049
Distributed computing device power Jun 27, 2018 Issued
Array ( [id] => 18997871 [patent_doc_number] => 11914715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-27 [patent_title] => Device unit suitable for operation in a protected and/or open operating state and associated method [patent_app_type] => utility [patent_app_number] => 16/466869 [patent_app_country] => US [patent_app_date] => 2017-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4478 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16466869 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/466869
Device unit suitable for operation in a protected and/or open operating state and associated method Oct 9, 2017 Issued
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