Christopher Lee

Array ( [id] => 4227218 [patent_doc_number] => 06143070 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Silicon-germanium bulk alloy growth by liquid encapsulated zone melting' [patent_app_type] => 1 [patent_app_number] => 9/093846 [patent_app_country] => US [patent_app_date] => 1998-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2642 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/143/06143070.pdf [firstpage_image] =>[orig_patent_app_number] => 093846 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3954836 [patent_doc_number] => 05935870 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Top view TEM sample preparation method' [patent_app_type] => 1 [patent_app_number] => 9/079883 [patent_app_country] => US [patent_app_date] => 1998-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2078 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935870.pdf [firstpage_image] =>[orig_patent_app_number] => 079883 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3994401 [patent_doc_number] => 05985765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-16 [patent_title] => 'Method for reducing bonding pad loss using a capping layer when etching bonding pad passivation openings' [patent_app_type] => 1 [patent_app_number] => 9/075368 [patent_app_country] => US [patent_app_date] => 1998-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3204 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/985/05985765.pdf [firstpage_image] =>[orig_patent_app_number] => 075368 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3981655 [patent_doc_number] => 05958795 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Chemical-mechanical polishing for shallow trench isolation' [patent_app_type] => 1 [patent_app_number] => 9/075597 [patent_app_country] => US [patent_app_date] => 1998-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 2038 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/958/05958795.pdf [firstpage_image] =>[orig_patent_app_number] => 075597 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3911566 [patent_doc_number] => 06001742 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Method for etching tantalum oxide layer' [patent_app_type] => 1 [patent_app_number] => 9/074639 [patent_app_country] => US [patent_app_date] => 1998-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2030 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/001/06001742.pdf [firstpage_image] =>[orig_patent_app_number] => 074639 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4215204 [patent_doc_number] => 06110834 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Semiconductor device and manufacturing method thereof for removing reaction products of dry etching' [patent_app_type] => 1 [patent_app_number] => 9/070914 [patent_app_country] => US [patent_app_date] => 1998-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4093 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/110/06110834.pdf [firstpage_image] =>[orig_patent_app_number] => 070914 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4154957 [patent_doc_number] => 06103626 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-15 [patent_title] => 'Method for forming dummy pattern areas in a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/064128 [patent_app_country] => US [patent_app_date] => 1998-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 16 [patent_no_of_words] => 7670 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 399 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/103/06103626.pdf [firstpage_image] =>[orig_patent_app_number] => 064128 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4409313 [patent_doc_number] => 06228773 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Synchronous multiplexed near zero overhead architecture for vacuum processes' [patent_app_type] => 1 [patent_app_number] => 9/060095 [patent_app_country] => US [patent_app_date] => 1998-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 36 [patent_no_of_words] => 8774 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/228/06228773.pdf [firstpage_image] =>[orig_patent_app_number] => 060095 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3986740 [patent_doc_number] => 05919302 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Low defect density vacancy dominated silicon' [patent_app_type] => 1 [patent_app_number] => 9/057851 [patent_app_country] => US [patent_app_date] => 1998-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 26 [patent_no_of_words] => 13888 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/919/05919302.pdf [firstpage_image] =>[orig_patent_app_number] => 057851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4038524 [patent_doc_number] => 05968263 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Open-loop method and system for controlling growth of semiconductor crystal' [patent_app_type] => 1 [patent_app_number] => 9/053164 [patent_app_country] => US [patent_app_date] => 1998-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 6675 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/968/05968263.pdf [firstpage_image] =>[orig_patent_app_number] => 053164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3954879 [patent_doc_number] => 05935874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-10 [patent_title] => 'Techniques for forming trenches in a silicon layer of a substrate in a high density plasma processing system' [patent_app_type] => 1 [patent_app_number] => 9/052997 [patent_app_country] => US [patent_app_date] => 1998-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4172 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/935/05935874.pdf [firstpage_image] =>[orig_patent_app_number] => 052997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4117253 [patent_doc_number] => 06071817 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Isolation method utilizing a high pressure oxidation' [patent_app_type] => 1 [patent_app_number] => 9/046242 [patent_app_country] => US [patent_app_date] => 1998-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2588 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071817.pdf [firstpage_image] =>[orig_patent_app_number] => 046242 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4107034 [patent_doc_number] => 06022808 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-08 [patent_title] => 'Copper interconnect methodology for enhanced electromigration resistance' [patent_app_type] => 1 [patent_app_number] => 9/039393 [patent_app_country] => US [patent_app_date] => 1998-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3090 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/022/06022808.pdf [firstpage_image] =>[orig_patent_app_number] => 039393 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4181643 [patent_doc_number] => 06020262 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-01 [patent_title] => 'Methods and apparatus for chemical mechanical planarization (CMP) of a semiconductor wafer' [patent_app_type] => 1 [patent_app_number] => 9/036478 [patent_app_country] => US [patent_app_date] => 1998-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 2105 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/020/06020262.pdf [firstpage_image] =>[orig_patent_app_number] => 036478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4250782 [patent_doc_number] => 06207575 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Local interconnect etch characterization using AFM' [patent_app_type] => 1 [patent_app_number] => 9/027047 [patent_app_country] => US [patent_app_date] => 1998-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 4365 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/207/06207575.pdf [firstpage_image] =>[orig_patent_app_number] => 027047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4183377 [patent_doc_number] => 06159824 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-12 [patent_title] => 'Silicon-on-silicon wafer bonding process using a thin film blister-separation method' [patent_app_type] => 1 [patent_app_number] => 9/025967 [patent_app_country] => US [patent_app_date] => 1998-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 4645 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/159/06159824.pdf [firstpage_image] =>[orig_patent_app_number] => 025967 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4246919 [patent_doc_number] => 06136724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-24 [patent_title] => 'Multiple stage wet processing chamber' [patent_app_type] => 1 [patent_app_number] => 9/025612 [patent_app_country] => US [patent_app_date] => 1998-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 5865 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/136/06136724.pdf [firstpage_image] =>[orig_patent_app_number] => 025612 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1507491 [patent_doc_number] => 06440855 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Method of processing surface of workpiece and method of forming semiconductor thin layer' [patent_app_type] => B1 [patent_app_number] => 09/025551 [patent_app_country] => US [patent_app_date] => 1998-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 11054 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/440/06440855.pdf [firstpage_image] =>[orig_patent_app_number] => 09025551 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3918674 [patent_doc_number] => 05913975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-22 [patent_title] => 'Crucible and method of preparation thereof' [patent_app_type] => 1 [patent_app_number] => 9/017942 [patent_app_country] => US [patent_app_date] => 1998-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2736 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/913/05913975.pdf [firstpage_image] =>[orig_patent_app_number] => 017942 [rel_patent_id] =>[rel_patent_doc_number] =>)