Christopher M. Gross

Array ( [id] => 4883907 [patent_doc_number] => 20080258239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-23 [patent_title] => 'METHODS FOR MANUFACTURING A TRENCH TYPE SEMICONDUCTOR DEVICE HAVING A THERMALLY SENSITIVE REFILL MATERIAL' [patent_app_type] => utility [patent_app_number] => 11/962523 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5690 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20080258239.pdf [firstpage_image] =>[orig_patent_app_number] => 11962523 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4673351 [patent_doc_number] => 20080210979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-04 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD FOR DESIGNING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/962263 [patent_app_country] => US [patent_app_date] => 2007-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3302 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20080210979.pdf [firstpage_image] =>[orig_patent_app_number] => 11962263 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8435887 [patent_doc_number] => 08283655 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Producing layered structures with semiconductive regions or subregions' [patent_app_type] => utility [patent_app_number] => 11/960874 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 11998 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11960874 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5088 [patent_doc_number] => 07816726 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-10-19 [patent_title] => 'Nonvolatile memories with laterally recessed charge-trapping dielectric' [patent_app_type] => utility [patent_app_number] => 11/961183 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 17 [patent_no_of_words] => 3895 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/816/07816726.pdf [firstpage_image] =>[orig_patent_app_number] => 11961183 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4876528 [patent_doc_number] => 20080149911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'PROGRAMMABLE-RESISTANCE MEMORY CELL' [patent_app_type] => utility [patent_app_number] => 11/961593 [patent_app_country] => US [patent_app_date] => 2007-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3693 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20080149911.pdf [firstpage_image] =>[orig_patent_app_number] => 11961593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4965366 [patent_doc_number] => 20080108186 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'Method of providing protection against charging damage in hybrid orientation transistors' [patent_app_type] => utility [patent_app_number] => 12/002807 [patent_app_country] => US [patent_app_date] => 2007-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4486 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20080108186.pdf [firstpage_image] =>[orig_patent_app_number] => 12002807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4511055 [patent_doc_number] => 07915737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-29 [patent_title] => 'Packing board for electronic device, packing board manufacturing method, semiconductor module, semiconductor module manufacturing method, and mobile device' [patent_app_type] => utility [patent_app_number] => 11/957030 [patent_app_country] => US [patent_app_date] => 2007-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 39 [patent_no_of_words] => 14595 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/915/07915737.pdf [firstpage_image] =>[orig_patent_app_number] => 11957030 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8422196 [patent_doc_number] => 08278684 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-10-02 [patent_title] => 'Voltage protection device' [patent_app_type] => utility [patent_app_number] => 11/954514 [patent_app_country] => US [patent_app_date] => 2007-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 4885 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11954514 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4749161 [patent_doc_number] => 20080157232 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME, AND NAND GATE CIRCUIT USING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/954193 [patent_app_country] => US [patent_app_date] => 2007-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2891 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157232.pdf [firstpage_image] =>[orig_patent_app_number] => 11954193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4749074 [patent_doc_number] => 20080157145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'Method of fabricating image sensor' [patent_app_type] => utility [patent_app_number] => 11/953593 [patent_app_country] => US [patent_app_date] => 2007-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2444 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20080157145.pdf [firstpage_image] =>[orig_patent_app_number] => 11953593 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4743357 [patent_doc_number] => 20080087958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'SEMICONDUCTOR DEVICE WITH DOPED TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/951833 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2738 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20080087958.pdf [firstpage_image] =>[orig_patent_app_number] => 11951833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4876664 [patent_doc_number] => 20080150047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'GATE INSULATING LAYER IN A SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/951834 [patent_app_country] => US [patent_app_date] => 2007-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1439 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20080150047.pdf [firstpage_image] =>[orig_patent_app_number] => 11951834 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5572990 [patent_doc_number] => 20090140351 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-06-04 [patent_title] => 'MOS Devices Having Elevated Source/Drain Regions' [patent_app_type] => utility [patent_app_number] => 11/948823 [patent_app_country] => US [patent_app_date] => 2007-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3535 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20090140351.pdf [firstpage_image] =>[orig_patent_app_number] => 11948823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4441862 [patent_doc_number] => 07927938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-19 [patent_title] => 'Fin-JFET' [patent_app_type] => utility [patent_app_number] => 11/942513 [patent_app_country] => US [patent_app_date] => 2007-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 21 [patent_no_of_words] => 10524 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/927/07927938.pdf [firstpage_image] =>[orig_patent_app_number] => 11942513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4826492 [patent_doc_number] => 20080125171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-29 [patent_title] => 'PORTABLE TERMINAL WITH PROTRUSION TYPE MIC MODULE' [patent_app_type] => utility [patent_app_number] => 11/941653 [patent_app_country] => US [patent_app_date] => 2007-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3511 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0125/20080125171.pdf [firstpage_image] =>[orig_patent_app_number] => 11941653 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7725555 [patent_doc_number] => 08098832 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-17 [patent_title] => 'Apparatus and method for detecting sound' [patent_app_type] => utility [patent_app_number] => 12/376637 [patent_app_country] => US [patent_app_date] => 2007-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3400 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/098/08098832.pdf [firstpage_image] =>[orig_patent_app_number] => 12376637 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4782496 [patent_doc_number] => 20080135825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-12 [patent_title] => 'PHASE-CHANGE MEMORY DEVICE AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/936503 [patent_app_country] => US [patent_app_date] => 2007-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4235 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0135/20080135825.pdf [firstpage_image] =>[orig_patent_app_number] => 11936503 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 221353 [patent_doc_number] => 07608899 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-10-27 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/936443 [patent_app_country] => US [patent_app_date] => 2007-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 19 [patent_no_of_words] => 9188 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/608/07608899.pdf [firstpage_image] =>[orig_patent_app_number] => 11936443 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4963054 [patent_doc_number] => 20080105874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-05-08 [patent_title] => 'THIN FILM TRANSISTOR, MANUFACTURING METHOD THEREOF, AND TFT LCD USING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/935073 [patent_app_country] => US [patent_app_date] => 2007-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4863 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20080105874.pdf [firstpage_image] =>[orig_patent_app_number] => 11935073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4723849 [patent_doc_number] => 20080203390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-28 [patent_title] => 'METHOD FOR MANUFACTURING A SIGNAL LINE, THIN FILM TRANSISTOR PANEL, AND METHOD FOR MANUFACTURING THE THIN FILM TRANSISTOR PANEL' [patent_app_type] => utility [patent_app_number] => 11/932233 [patent_app_country] => US [patent_app_date] => 2007-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 44 [patent_figures_cnt] => 44 [patent_no_of_words] => 8602 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0203/20080203390.pdf [firstpage_image] =>[orig_patent_app_number] => 11932233 [rel_patent_id] =>[rel_patent_doc_number] =>)