
Christopher M. Gross
Examiner (ID: 14649, Phone: (571)272-4446 , Office: P/1639 )
| Most Active Art Unit | 1639 |
| Art Unit(s) | 1675, 1684, 1639, 1636 |
| Total Applications | 901 |
| Issued Applications | 468 |
| Pending Applications | 119 |
| Abandoned Applications | 336 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 260401
[patent_doc_number] => 07573129
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-08-11
[patent_title] => 'Contrast interposer stacking system and method'
[patent_app_type] => utility
[patent_app_number] => 11/533743
[patent_app_country] => US
[patent_app_date] => 2006-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 4094
[patent_no_of_claims] => 20
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[patent_words_short_claim] => 202
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/573/07573129.pdf
[firstpage_image] =>[orig_patent_app_number] => 11533743
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/533743 | Contrast interposer stacking system and method | Sep 19, 2006 | Issued |
Array
(
[id] => 360050
[patent_doc_number] => 07485929
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-02-03
[patent_title] => 'Semiconductor-on-insulator (SOI) strained active areas'
[patent_app_type] => utility
[patent_app_number] => 11/522282
[patent_app_country] => US
[patent_app_date] => 2006-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[patent_no_of_words] => 2477
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[pdf_file] => patents/07/485/07485929.pdf
[firstpage_image] =>[orig_patent_app_number] => 11522282
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/522282 | Semiconductor-on-insulator (SOI) strained active areas | Sep 14, 2006 | Issued |
Array
(
[id] => 7551122
[patent_doc_number] => 08063456
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-11-22
[patent_title] => 'Mechanical switch with a curved bilayer'
[patent_app_type] => utility
[patent_app_number] => 11/519623
[patent_app_country] => US
[patent_app_date] => 2006-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[patent_no_of_words] => 6792
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[pdf_file] => patents/08/063/08063456.pdf
[firstpage_image] =>[orig_patent_app_number] => 11519623
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/519623 | Mechanical switch with a curved bilayer | Sep 11, 2006 | Issued |
Array
(
[id] => 10624546
[patent_doc_number] => 09343496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-17
[patent_title] => 'Solid-state imaging device, production method thereof and camera'
[patent_app_type] => utility
[patent_app_number] => 11/519663
[patent_app_country] => US
[patent_app_date] => 2006-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 4711
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/519663 | Solid-state imaging device, production method thereof and camera | Sep 10, 2006 | Issued |
Array
(
[id] => 250793
[patent_doc_number] => 07582549
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-09-01
[patent_title] => 'Atomic layer deposited barium strontium titanium oxide films'
[patent_app_type] => utility
[patent_app_number] => 11/510803
[patent_app_country] => US
[patent_app_date] => 2006-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/07/582/07582549.pdf
[firstpage_image] =>[orig_patent_app_number] => 11510803
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/510803 | Atomic layer deposited barium strontium titanium oxide films | Aug 24, 2006 | Issued |
Array
(
[id] => 5886149
[patent_doc_number] => 20060274483
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-12-07
[patent_title] => 'PRINTED CIRCUIT BOARD FOR CONNECTING OF MULT-WIRE CABLING TO SURGE PROTECTORS'
[patent_app_type] => utility
[patent_app_number] => 11/465363
[patent_app_country] => US
[patent_app_date] => 2006-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[pdf_file] => publications/A1/0274/20060274483.pdf
[firstpage_image] =>[orig_patent_app_number] => 11465363
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/465363 | PRINTED CIRCUIT BOARD FOR CONNECTING OF MULT-WIRE CABLING TO SURGE PROTECTORS | Aug 16, 2006 | Abandoned |
Array
(
[id] => 4651666
[patent_doc_number] => 20080038922
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-02-14
[patent_title] => 'Etch-stop layer and method of use'
[patent_app_type] => utility
[patent_app_number] => 11/502277
[patent_app_country] => US
[patent_app_date] => 2006-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2155
[patent_no_of_claims] => 19
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[pdf_file] => publications/A1/0038/20080038922.pdf
[firstpage_image] =>[orig_patent_app_number] => 11502277
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/502277 | Etch-stop layer and method of use | Aug 9, 2006 | Abandoned |
| 11/499964 | Lateral electrodeposition of compositionally modulated metal layers | Aug 6, 2006 | Abandoned |
Array
(
[id] => 5622981
[patent_doc_number] => 20060261486
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-23
[patent_title] => 'Semiconductor device including interconnection structure in which lines having different widths are connected with each other'
[patent_app_type] => utility
[patent_app_number] => 11/495786
[patent_app_country] => US
[patent_app_date] => 2006-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0261/20060261486.pdf
[firstpage_image] =>[orig_patent_app_number] => 11495786
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/495786 | Semiconductor device including interconnection structure in which lines having different widths are connected with each other | Jul 30, 2006 | Abandoned |
Array
(
[id] => 5202367
[patent_doc_number] => 20070023846
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-02-01
[patent_title] => 'Transistor'
[patent_app_type] => utility
[patent_app_number] => 11/495804
[patent_app_country] => US
[patent_app_date] => 2006-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => publications/A1/0023/20070023846.pdf
[firstpage_image] =>[orig_patent_app_number] => 11495804
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/495804 | Transistor | Jul 27, 2006 | Abandoned |
Array
(
[id] => 5622890
[patent_doc_number] => 20060261395
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-11-23
[patent_title] => 'Semiconductor fabrication using a collar'
[patent_app_type] => utility
[patent_app_number] => 11/490770
[patent_app_country] => US
[patent_app_date] => 2006-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
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[patent_no_of_claims] => 42
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[firstpage_image] =>[orig_patent_app_number] => 11490770
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/490770 | Semiconductor fabrication using a collar | Jul 20, 2006 | Issued |
Array
(
[id] => 4800546
[patent_doc_number] => 20080012133
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-17
[patent_title] => 'Reducing resistivity in interconnect structures by forming an inter-layer'
[patent_app_type] => utility
[patent_app_number] => 11/486893
[patent_app_country] => US
[patent_app_date] => 2006-07-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/486893 | Reducing resistivity in interconnect structures by forming an inter-layer | Jul 12, 2006 | Issued |
Array
(
[id] => 491585
[patent_doc_number] => 07215019
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[patent_issue_date] => 2007-05-08
[patent_title] => 'Semiconductor chip assembly with pillar press-fit into ground plane'
[patent_app_type] => utility
[patent_app_number] => 11/478289
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[firstpage_image] =>[orig_patent_app_number] => 11478289
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/478289 | Semiconductor chip assembly with pillar press-fit into ground plane | Jun 28, 2006 | Issued |
Array
(
[id] => 5138983
[patent_doc_number] => 20070001199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-01-04
[patent_title] => 'Circuits and Integrated Circuits Including Field Effect Transistors Having Differing Body Effects'
[patent_app_type] => utility
[patent_app_number] => 11/426494
[patent_app_country] => US
[patent_app_date] => 2006-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
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[firstpage_image] =>[orig_patent_app_number] => 11426494
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/426494 | Circuits and Integrated Circuits Including Field Effect Transistors Having Differing Body Effects | Jun 25, 2006 | Abandoned |
Array
(
[id] => 5848714
[patent_doc_number] => 20060231922
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2006-10-19
[patent_title] => 'GATE DIELECTRIC ANTIFUSE CIRCUIT TO PROTECT A HIGH-VOLTAGE TRANSISTOR'
[patent_app_type] => utility
[patent_app_number] => 11/426523
[patent_app_country] => US
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[firstpage_image] =>[orig_patent_app_number] => 11426523
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/426523 | Gate dielectric antifuse circuit to protect a high-voltage transistor | Jun 25, 2006 | Issued |
Array
(
[id] => 5228177
[patent_doc_number] => 20070290284
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'Incident light angle detector for light sensitive integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/471054
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[firstpage_image] =>[orig_patent_app_number] => 11471054
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/471054 | Incident light angle detector for light sensitive integrated circuit | Jun 18, 2006 | Issued |
Array
(
[id] => 5228184
[patent_doc_number] => 20070290291
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-20
[patent_title] => 'HIGH VOLTAGE DEVICES'
[patent_app_type] => utility
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[firstpage_image] =>[orig_patent_app_number] => 11424604
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424604 | High voltage devices | Jun 15, 2006 | Issued |
Array
(
[id] => 5685896
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[patent_title] => 'POWER SEMICONDUCTOR MODULE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424434 | Power semiconductor module | Jun 14, 2006 | Issued |
Array
(
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[patent_title] => 'DIE STACK CAPACITORS, ASSEMBLIES AND METHODS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/424019 | DIE STACK CAPACITORS, ASSEMBLIES AND METHODS | Jun 13, 2006 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/421774 | Method for symmetric capacitor formation | Jun 1, 2006 | Issued |