Christopher M. Gross

Array ( [id] => 8104893 [patent_doc_number] => 08154093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-10 [patent_title] => 'Nano-electronic sensors for chemical and biological analytes, including capacitance and bio-membrane devices' [patent_app_type] => utility [patent_app_number] => 11/400038 [patent_app_country] => US [patent_app_date] => 2006-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 53 [patent_no_of_words] => 21274 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/154/08154093.pdf [firstpage_image] =>[orig_patent_app_number] => 11400038 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5848536 [patent_doc_number] => 20060231835 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-19 [patent_title] => 'Semiconductor device including ROM interface pad' [patent_app_type] => utility [patent_app_number] => 11/398313 [patent_app_country] => US [patent_app_date] => 2006-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4465 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20060231835.pdf [firstpage_image] =>[orig_patent_app_number] => 11398313 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5088748 [patent_doc_number] => 20070228387 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Uniform emission LED package' [patent_app_type] => utility [patent_app_number] => 11/398214 [patent_app_country] => US [patent_app_date] => 2006-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6484 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20070228387.pdf [firstpage_image] =>[orig_patent_app_number] => 11398214 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5088840 [patent_doc_number] => 20070228479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'PROTECTION AGAINST CHARGING DAMAGE IN HYBRID ORIENTATION TRANSISTORS' [patent_app_type] => utility [patent_app_number] => 11/308513 [patent_app_country] => US [patent_app_date] => 2006-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4665 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0228/20070228479.pdf [firstpage_image] =>[orig_patent_app_number] => 11308513 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 289328 [patent_doc_number] => 07547944 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-16 [patent_title] => 'Scalable electrically eraseable and programmable memory (EEPROM) cell array' [patent_app_type] => utility [patent_app_number] => 11/278103 [patent_app_country] => US [patent_app_date] => 2006-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5255 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/547/07547944.pdf [firstpage_image] =>[orig_patent_app_number] => 11278103 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7692031 [patent_doc_number] => 20070232002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Static random access memory using independent double gate transistors' [patent_app_type] => utility [patent_app_number] => 11/392524 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4091 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0232/20070232002.pdf [firstpage_image] =>[orig_patent_app_number] => 11392524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5874610 [patent_doc_number] => 20060166490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Forming buried via hole substrates' [patent_app_type] => utility [patent_app_number] => 11/392120 [patent_app_country] => US [patent_app_date] => 2006-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1378 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20060166490.pdf [firstpage_image] =>[orig_patent_app_number] => 11392120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5869060 [patent_doc_number] => 20060163677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-27 [patent_title] => 'Methods of forming a semiconductor device having a metal gate electrode and associated devices' [patent_app_type] => utility [patent_app_number] => 11/386644 [patent_app_country] => US [patent_app_date] => 2006-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3095 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0163/20060163677.pdf [firstpage_image] =>[orig_patent_app_number] => 11386644 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5060268 [patent_doc_number] => 20070221905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-27 [patent_title] => 'Reduced power consumption phase change memory and methods for forming the same' [patent_app_type] => utility [patent_app_number] => 11/377664 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2861 [patent_no_of_claims] => 40 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0221/20070221905.pdf [firstpage_image] =>[orig_patent_app_number] => 11377664 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5256664 [patent_doc_number] => 20070210296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'ELECTRODE FOR PHASE CHANGE MEMORY DEVICE AND METHOD' [patent_app_type] => utility [patent_app_number] => 11/308104 [patent_app_country] => US [patent_app_date] => 2006-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1930 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20070210296.pdf [firstpage_image] =>[orig_patent_app_number] => 11308104 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 292603 [patent_doc_number] => 07544896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Forming a porous dielectric layer and structures formed thereby' [patent_app_type] => utility [patent_app_number] => 11/367180 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3185 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/544/07544896.pdf [firstpage_image] =>[orig_patent_app_number] => 11367180 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5631743 [patent_doc_number] => 20060148213 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Method of manufacturing display device' [patent_app_type] => utility [patent_app_number] => 11/366398 [patent_app_country] => US [patent_app_date] => 2006-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6069 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0148/20060148213.pdf [firstpage_image] =>[orig_patent_app_number] => 11366398 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 590948 [patent_doc_number] => 07439550 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-10-21 [patent_title] => 'Semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 11/276498 [patent_app_country] => US [patent_app_date] => 2006-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4692 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/439/07439550.pdf [firstpage_image] =>[orig_patent_app_number] => 11276498 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 197576 [patent_doc_number] => 07638861 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-29 [patent_title] => 'Flip chip MLP with conductive ink' [patent_app_type] => utility [patent_app_number] => 11/364014 [patent_app_country] => US [patent_app_date] => 2006-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 3786 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/638/07638861.pdf [firstpage_image] =>[orig_patent_app_number] => 11364014 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5832145 [patent_doc_number] => 20060243975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-02 [patent_title] => 'Thin film transistor substrate, method of manufacturing the same and display apparatus having the same' [patent_app_type] => utility [patent_app_number] => 11/361804 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3841 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0243/20060243975.pdf [firstpage_image] =>[orig_patent_app_number] => 11361804 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 133857 [patent_doc_number] => 07696578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-04-13 [patent_title] => 'Selective CESL structure for CMOS application' [patent_app_type] => utility [patent_app_number] => 11/349804 [patent_app_country] => US [patent_app_date] => 2006-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 3237 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/696/07696578.pdf [firstpage_image] =>[orig_patent_app_number] => 11349804 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5186058 [patent_doc_number] => 20070164365 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-07-19 [patent_title] => 'SINGLE STRESS LINER FOR MIGRATION STABILITY AND SPEED' [patent_app_type] => utility [patent_app_number] => 11/306943 [patent_app_country] => US [patent_app_date] => 2006-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1698 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20070164365.pdf [firstpage_image] =>[orig_patent_app_number] => 11306943 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4432571 [patent_doc_number] => 07897443 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-01 [patent_title] => 'Production method of semiconductor device and semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/883483 [patent_app_country] => US [patent_app_date] => 2006-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 8119 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/897/07897443.pdf [firstpage_image] =>[orig_patent_app_number] => 11883483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5773975 [patent_doc_number] => 20060102951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-18 [patent_title] => 'Nonvolatile Memory Device and Method for Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 11/275494 [patent_app_country] => US [patent_app_date] => 2006-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3187 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0102/20060102951.pdf [firstpage_image] =>[orig_patent_app_number] => 11275494 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5640445 [patent_doc_number] => 20060278900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-14 [patent_title] => 'Phase change memory device having an adhesion layer and manufacturing process thereof' [patent_app_type] => utility [patent_app_number] => 11/312233 [patent_app_country] => US [patent_app_date] => 2005-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6544 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0278/20060278900.pdf [firstpage_image] =>[orig_patent_app_number] => 11312233 [rel_patent_id] =>[rel_patent_doc_number] =>)