Search

Christopher M. Gross

Examiner (ID: 14649, Phone: (571)272-4446 , Office: P/1639 )

Most Active Art Unit
1639
Art Unit(s)
1675, 1684, 1639, 1636
Total Applications
901
Issued Applications
468
Pending Applications
119
Abandoned Applications
336

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 900947 [patent_doc_number] => 07339241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-03-04 [patent_title] => 'FinFET structure with contacts' [patent_app_type] => utility [patent_app_number] => 11/216974 [patent_app_country] => US [patent_app_date] => 2005-08-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2560 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/339/07339241.pdf [firstpage_image] =>[orig_patent_app_number] => 11216974 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/216974
FinFET structure with contacts Aug 30, 2005 Issued
Array ( [id] => 5180670 [patent_doc_number] => 20070052012 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-08 [patent_title] => 'Vertical tunneling nano-wire transistor' [patent_app_type] => utility [patent_app_number] => 11/210374 [patent_app_country] => US [patent_app_date] => 2005-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4244 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20070052012.pdf [firstpage_image] =>[orig_patent_app_number] => 11210374 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/210374
Vertical tunneling nano-wire transistor Aug 23, 2005 Abandoned
Array ( [id] => 160090 [patent_doc_number] => 07675108 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-09 [patent_title] => 'Method for producing a buried N-doped semiconductor zone in a semiconductor body and semiconductor component' [patent_app_type] => utility [patent_app_number] => 11/201874 [patent_app_country] => US [patent_app_date] => 2005-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4443 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/675/07675108.pdf [firstpage_image] =>[orig_patent_app_number] => 11201874 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/201874
Method for producing a buried N-doped semiconductor zone in a semiconductor body and semiconductor component Aug 10, 2005 Issued
Array ( [id] => 5881070 [patent_doc_number] => 20060030153 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Apparatus and method for manufacturing semiconductor device incorporating fuse elements' [patent_app_type] => utility [patent_app_number] => 11/199253 [patent_app_country] => US [patent_app_date] => 2005-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9731 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20060030153.pdf [firstpage_image] =>[orig_patent_app_number] => 11199253 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199253
Apparatus and method for manufacturing semiconductor device incorporating fuse elements Aug 8, 2005 Issued
Array ( [id] => 217498 [patent_doc_number] => 07612410 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-11-03 [patent_title] => 'Trigger device for ESD protection circuit' [patent_app_type] => utility [patent_app_number] => 11/199614 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2927 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/612/07612410.pdf [firstpage_image] =>[orig_patent_app_number] => 11199614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/199614
Trigger device for ESD protection circuit Aug 7, 2005 Issued
Array ( [id] => 5628879 [patent_doc_number] => 20060145347 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Semiconductor device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/198224 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7899 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145347.pdf [firstpage_image] =>[orig_patent_app_number] => 11198224 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198224
Semiconductor device and method for fabricating the same Aug 7, 2005 Abandoned
Array ( [id] => 5664670 [patent_doc_number] => 20060170020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-03 [patent_title] => 'Semiconductor memory device and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/198154 [patent_app_country] => US [patent_app_date] => 2005-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6129 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20060170020.pdf [firstpage_image] =>[orig_patent_app_number] => 11198154 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/198154
Semiconductor memory device and method for fabricating the same Aug 7, 2005 Abandoned
Array ( [id] => 4743275 [patent_doc_number] => 20080087876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-04-17 [patent_title] => 'Method for Fabricating Lateral Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 11/632934 [patent_app_country] => US [patent_app_date] => 2005-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5892 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0087/20080087876.pdf [firstpage_image] =>[orig_patent_app_number] => 11632934 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/632934
Method for fabricating lateral semiconductor device Aug 1, 2005 Issued
Array ( [id] => 419064 [patent_doc_number] => 07276739 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-10-02 [patent_title] => 'Low thermal resistance light emitting diode' [patent_app_type] => utility [patent_app_number] => 11/194704 [patent_app_country] => US [patent_app_date] => 2005-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2193 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/276/07276739.pdf [firstpage_image] =>[orig_patent_app_number] => 11194704 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/194704
Low thermal resistance light emitting diode Aug 1, 2005 Issued
Array ( [id] => 5877344 [patent_doc_number] => 20060027479 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-09 [patent_title] => 'Optical or electronic module and method for its production' [patent_app_type] => utility [patent_app_number] => 11/191308 [patent_app_country] => US [patent_app_date] => 2005-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4559 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0027/20060027479.pdf [firstpage_image] =>[orig_patent_app_number] => 11191308 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/191308
Optical or electronic module and method for its production Jul 27, 2005 Abandoned
Array ( [id] => 5518527 [patent_doc_number] => 20090026508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'Solid-state photosensor with electronic aperture control' [patent_app_type] => utility [patent_app_number] => 11/659313 [patent_app_country] => US [patent_app_date] => 2005-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5479 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0026/20090026508.pdf [firstpage_image] =>[orig_patent_app_number] => 11659313 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/659313
Solid-state photosensor with electronic aperture control Jul 26, 2005 Issued
11/189593 Integral plated semiconductor package substrate stiffener Jul 25, 2005 Abandoned
Array ( [id] => 5763188 [patent_doc_number] => 20060017127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-26 [patent_title] => 'Optical package for a semiconductor sensor' [patent_app_type] => utility [patent_app_number] => 11/187634 [patent_app_country] => US [patent_app_date] => 2005-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2518 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0017/20060017127.pdf [firstpage_image] =>[orig_patent_app_number] => 11187634 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/187634
Optical package for a semiconductor sensor Jul 21, 2005 Abandoned
Array ( [id] => 5810852 [patent_doc_number] => 20060081960 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-04-20 [patent_title] => 'Integrated capacitor on packaging substrate' [patent_app_type] => utility [patent_app_number] => 11/183864 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1098 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20060081960.pdf [firstpage_image] =>[orig_patent_app_number] => 11183864 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183864
Integrated capacitor on packaging substrate Jul 18, 2005 Issued
Array ( [id] => 5745760 [patent_doc_number] => 20060108690 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-05-25 [patent_title] => 'Circuit board with reduced simultaneous switching noise' [patent_app_type] => utility [patent_app_number] => 11/183824 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1042 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20060108690.pdf [firstpage_image] =>[orig_patent_app_number] => 11183824 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183824
Circuit board with reduced simultaneous switching noise Jul 18, 2005 Abandoned
Array ( [id] => 5819682 [patent_doc_number] => 20060023995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Vertical offset structure and method for fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/183863 [patent_app_country] => US [patent_app_date] => 2005-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3901 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0023/20060023995.pdf [firstpage_image] =>[orig_patent_app_number] => 11183863 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183863
Vertical offset structure and method for fabricating the same Jul 18, 2005 Issued
Array ( [id] => 5796475 [patent_doc_number] => 20060033152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-16 [patent_title] => 'Non-volatile memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 11/183614 [patent_app_country] => US [patent_app_date] => 2005-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7950 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0033/20060033152.pdf [firstpage_image] =>[orig_patent_app_number] => 11183614 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/183614
Non-volatile memory device and method of fabricating the same Jul 17, 2005 Issued
Array ( [id] => 5685957 [patent_doc_number] => 20060284272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-21 [patent_title] => 'Gate structure and method for preparing the same' [patent_app_type] => utility [patent_app_number] => 11/181943 [patent_app_country] => US [patent_app_date] => 2005-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1634 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20060284272.pdf [firstpage_image] =>[orig_patent_app_number] => 11181943 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/181943
Gate structure and method for preparing the same Jul 14, 2005 Abandoned
Array ( [id] => 5072973 [patent_doc_number] => 20070012948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-01-18 [patent_title] => 'Combined APD / PIN InGaAs photodetector with microlens structure and method of manufacture' [patent_app_type] => utility [patent_app_number] => 11/182493 [patent_app_country] => US [patent_app_date] => 2005-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 3274 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0012/20070012948.pdf [firstpage_image] =>[orig_patent_app_number] => 11182493 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/182493
Combined APD / PIN InGaAs photodetector with microlens structure and method of manufacture Jul 14, 2005 Abandoned
Array ( [id] => 338344 [patent_doc_number] => 07504689 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-17 [patent_title] => 'Semiconductor device and manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/182013 [patent_app_country] => US [patent_app_date] => 2005-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 100 [patent_figures_cnt] => 170 [patent_no_of_words] => 12440 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/504/07504689.pdf [firstpage_image] =>[orig_patent_app_number] => 11182013 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/182013
Semiconductor device and manufacturing method of semiconductor device Jul 14, 2005 Issued
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