
Christopher M. Gross
Examiner (ID: 14649, Phone: (571)272-4446 , Office: P/1639 )
| Most Active Art Unit | 1639 |
| Art Unit(s) | 1675, 1684, 1639, 1636 |
| Total Applications | 901 |
| Issued Applications | 468 |
| Pending Applications | 119 |
| Abandoned Applications | 336 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5256732
[patent_doc_number] => 20070210364
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-09-13
[patent_title] => 'Mos Capacitor And Semiconductor Device'
[patent_app_type] => utility
[patent_app_number] => 11/547904
[patent_app_country] => US
[patent_app_date] => 2005-04-21
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[patent_no_of_words] => 14285
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[pdf_file] => publications/A1/0210/20070210364.pdf
[firstpage_image] =>[orig_patent_app_number] => 11547904
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/547904 | MOS capacitor and semiconductor device | Apr 20, 2005 | Issued |
Array
(
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[patent_doc_number] => 07470955
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[patent_kind] => B2
[patent_issue_date] => 2008-12-30
[patent_title] => 'Technique for improving negative potential immunity of an integrated circuit'
[patent_app_type] => utility
[patent_app_number] => 11/107084
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[patent_app_date] => 2005-04-15
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/107084 | Technique for improving negative potential immunity of an integrated circuit | Apr 14, 2005 | Issued |
Array
(
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[patent_issue_date] => 2009-08-11
[patent_title] => 'Semiconductor device and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/092773
[patent_app_country] => US
[patent_app_date] => 2005-03-30
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/092773 | Semiconductor device and manufacturing method thereof | Mar 29, 2005 | Issued |
Array
(
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[patent_kind] => A1
[patent_issue_date] => 2005-10-06
[patent_title] => 'Through electrode, spacer provided with the through electrode, and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 11/092703
[patent_app_country] => US
[patent_app_date] => 2005-03-30
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/092703 | Through electrode, spacer provided with the through electrode, and method of manufacturing the same | Mar 29, 2005 | Abandoned |
Array
(
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[patent_title] => 'Electronic circuit device having silicon substrate'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/093614 | Electronic circuit device having silicon substrate | Mar 29, 2005 | Abandoned |
Array
(
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[patent_doc_number] => 20050242398
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[patent_title] => 'Fully depleted SOI multiple threshold voltage application'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/093593 | Fully depleted SOI multiple threshold voltage application | Mar 28, 2005 | Issued |
Array
(
[id] => 5765683
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[patent_title] => 'Heterojunction field effect semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 11/091474
[patent_app_country] => US
[patent_app_date] => 2005-03-29
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[patent_drawing_sheets_cnt] => 4
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/091474 | Heterojunction field effect semiconductor device | Mar 28, 2005 | Abandoned |
Array
(
[id] => 5634914
[patent_doc_number] => 20060065887
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[patent_kind] => A1
[patent_issue_date] => 2006-03-30
[patent_title] => 'Carbon nanotube-based electronic devices made by electrolytic deposition and applications thereof'
[patent_app_type] => utility
[patent_app_number] => 11/090193
[patent_app_country] => US
[patent_app_date] => 2005-03-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
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[pdf_file] => publications/A1/0065/20060065887.pdf
[firstpage_image] =>[orig_patent_app_number] => 11090193
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/090193 | Carbon nanotube-based electronic devices made by electrolytic deposition and applications thereof | Mar 27, 2005 | Abandoned |
Array
(
[id] => 6949774
[patent_doc_number] => 20050224868
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[patent_kind] => A1
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[patent_title] => 'MOS-gated device having a buried gate and process for forming same'
[patent_app_type] => utility
[patent_app_number] => 11/091733
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[patent_app_date] => 2005-03-28
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/091733 | MOS-gated device having a buried gate and process for forming same | Mar 27, 2005 | Issued |
Array
(
[id] => 432605
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[patent_issue_date] => 2007-09-04
[patent_title] => 'Organic electronic device and methods for manufacturing a device of this kind'
[patent_app_type] => utility
[patent_app_number] => 11/088194
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Array
(
[id] => 637807
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[patent_title] => 'Semiconductor-on-insulator (SOI) strained active areas'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/089403 | Semiconductor-on-insulator (SOI) strained active areas | Mar 22, 2005 | Issued |
Array
(
[id] => 7108529
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[rel_patent_id] =>[rel_patent_doc_number] =>) 11/083983 | Semiconductor device | Mar 20, 2005 | Issued |
Array
(
[id] => 447708
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[patent_title] => 'Magnetic sensor having vertical hall device and method for manufacturing the same'
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Array
(
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Array
(
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[patent_title] => 'Routing element for use in multi-chip modules, multi-chip modules including the routing element and methods'
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Array
(
[id] => 5224401
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[patent_title] => 'Optoelectronic Component with Multi-Part Housing Body'
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[patent_app_number] => 10/593794
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/593794 | Optoelectronic component with multi-part housing body | Mar 8, 2005 | Issued |
| 11/075576 | Method and system of manufacturing stacked memory modules using interface circuits | Mar 7, 2005 | Abandoned |
Array
(
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Array
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Array
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