Christopher M. Gross

Array ( [id] => 5634964 [patent_doc_number] => 20060065937 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-03-30 [patent_title] => 'Short channel effect of MOS devices by retrograde well engineering using tilted dopant implantation into recessed source/drain regions' [patent_app_type] => utility [patent_app_number] => 10/954914 [patent_app_country] => US [patent_app_date] => 2004-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4333 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0065/20060065937.pdf [firstpage_image] =>[orig_patent_app_number] => 10954914 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 469807 [patent_doc_number] => 07233068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-19 [patent_title] => 'Filling small dimension vias using supercritical carbon dioxide' [patent_app_type] => utility [patent_app_number] => 10/943634 [patent_app_country] => US [patent_app_date] => 2004-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 8 [patent_no_of_words] => 1624 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/233/07233068.pdf [firstpage_image] =>[orig_patent_app_number] => 10943634 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5056951 [patent_doc_number] => 20070059873 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-03-15 [patent_title] => 'Fabrication of single or multiple gate field plates' [patent_app_type] => utility [patent_app_number] => 10/570964 [patent_app_country] => US [patent_app_date] => 2004-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4434 [patent_no_of_claims] => 51 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20070059873.pdf [firstpage_image] =>[orig_patent_app_number] => 10570964 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4695420 [patent_doc_number] => 20080217604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-11 [patent_title] => 'Organic Semiconductor Film, Electron Device Using the Same and Manufacturing Method Therefor' [patent_app_type] => utility [patent_app_number] => 10/568934 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9757 [patent_no_of_claims] => 43 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0217/20080217604.pdf [firstpage_image] =>[orig_patent_app_number] => 10568934 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5395067 [patent_doc_number] => 20090315130 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-24 [patent_title] => 'Solid-state imaging apparatus and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/915334 [patent_app_country] => US [patent_app_date] => 2004-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4409 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0315/20090315130.pdf [firstpage_image] =>[orig_patent_app_number] => 10915334 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4876107 [patent_doc_number] => 20080149489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-26 [patent_title] => 'Multistep immersion of wafer into liquid bath' [patent_app_type] => utility [patent_app_number] => 10/915865 [patent_app_country] => US [patent_app_date] => 2004-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8890 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20080149489.pdf [firstpage_image] =>[orig_patent_app_number] => 10915865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7338704 [patent_doc_number] => 20040245648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Bonding material and bonding method' [patent_app_type] => new [patent_app_number] => 10/484454 [patent_app_country] => US [patent_app_date] => 2004-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 18513 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245648.pdf [firstpage_image] =>[orig_patent_app_number] => 10484454 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7140171 [patent_doc_number] => 20050116322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-02 [patent_title] => 'Circuit module' [patent_app_type] => utility [patent_app_number] => 10/900524 [patent_app_country] => US [patent_app_date] => 2004-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6611 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0116/20050116322.pdf [firstpage_image] =>[orig_patent_app_number] => 10900524 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7183411 [patent_doc_number] => 20050161789 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Package substrate pattern to accommodate optical waveguide' [patent_app_type] => utility [patent_app_number] => 10/883603 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3500 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20050161789.pdf [firstpage_image] =>[orig_patent_app_number] => 10883603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6975533 [patent_doc_number] => 20050285248 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Method and system for expanding flash storage device capacity' [patent_app_type] => utility [patent_app_number] => 10/881203 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2097 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285248.pdf [firstpage_image] =>[orig_patent_app_number] => 10881203 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6978075 [patent_doc_number] => 20050287793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Diffusion barrier process for routing polysilicon contacts to a metallization layer' [patent_app_type] => utility [patent_app_number] => 10/881303 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5348 [patent_no_of_claims] => 79 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0287/20050287793.pdf [firstpage_image] =>[orig_patent_app_number] => 10881303 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 457663 [patent_doc_number] => 07245012 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-07-17 [patent_title] => 'Thin film transistor substrate and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 10/878084 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 23 [patent_no_of_words] => 4298 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/245/07245012.pdf [firstpage_image] =>[orig_patent_app_number] => 10878084 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7236679 [patent_doc_number] => 20050139997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-06-30 [patent_title] => 'Chip assembly package' [patent_app_type] => utility [patent_app_number] => 10/876453 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1609 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20050139997.pdf [firstpage_image] =>[orig_patent_app_number] => 10876453 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6975540 [patent_doc_number] => 20050285255 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Device and method for tilted land grid array interconnects on a coreless substrate package' [patent_app_type] => utility [patent_app_number] => 10/880154 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3071 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285255.pdf [firstpage_image] =>[orig_patent_app_number] => 10880154 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 703172 [patent_doc_number] => 07064435 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-20 [patent_title] => 'Semiconductor package with improved ball land structure' [patent_app_type] => utility [patent_app_number] => 10/877733 [patent_app_country] => US [patent_app_date] => 2004-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 4027 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/064/07064435.pdf [firstpage_image] =>[orig_patent_app_number] => 10877733 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7404998 [patent_doc_number] => 20040262723 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-30 [patent_title] => 'Semiconductor device' [patent_app_type] => new [patent_app_number] => 10/874354 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7495 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0262/20040262723.pdf [firstpage_image] =>[orig_patent_app_number] => 10874354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6975538 [patent_doc_number] => 20050285253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Forming buried via hole substrates' [patent_app_type] => utility [patent_app_number] => 10/876434 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1353 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0285/20050285253.pdf [firstpage_image] =>[orig_patent_app_number] => 10876434 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7235541 [patent_doc_number] => 20040256738 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Battery protection circuit with integrated passive components' [patent_app_type] => new [patent_app_number] => 10/875473 [patent_app_country] => US [patent_app_date] => 2004-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2388 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20040256738.pdf [firstpage_image] =>[orig_patent_app_number] => 10875473 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6929100 [patent_doc_number] => 20050280133 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Multiple device package' [patent_app_type] => utility [patent_app_number] => 10/873743 [patent_app_country] => US [patent_app_date] => 2004-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1870 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280133.pdf [firstpage_image] =>[orig_patent_app_number] => 10873743 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 677143 [patent_doc_number] => 07087986 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-08-08 [patent_title] => 'Solder pad configuration for use in a micro-array integrated circuit package' [patent_app_type] => utility [patent_app_number] => 10/871313 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 5252 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/087/07087986.pdf [firstpage_image] =>[orig_patent_app_number] => 10871313 [rel_patent_id] =>[rel_patent_doc_number] =>)