Search

Christopher M. Gross

Examiner (ID: 14649, Phone: (571)272-4446 , Office: P/1639 )

Most Active Art Unit
1639
Art Unit(s)
1675, 1684, 1639, 1636
Total Applications
901
Issued Applications
468
Pending Applications
119
Abandoned Applications
336

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7235437 [patent_doc_number] => 20040256727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Multi-layer fine wiring interposer and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/869963 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4871 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20040256727.pdf [firstpage_image] =>[orig_patent_app_number] => 10869963 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869963
Multi-layer fine wiring interposer and manufacturing method thereof Jun 17, 2004 Abandoned
Array ( [id] => 432670 [patent_doc_number] => 07265444 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-09-04 [patent_title] => 'Resin molded semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/870023 [patent_app_country] => US [patent_app_date] => 2004-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 5052 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/265/07265444.pdf [firstpage_image] =>[orig_patent_app_number] => 10870023 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/870023
Resin molded semiconductor device Jun 17, 2004 Issued
Array ( [id] => 612685 [patent_doc_number] => 07148082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-12-12 [patent_title] => 'Method of making a semiconductor chip assembly with a press-fit ground plane' [patent_app_type] => utility [patent_app_number] => 10/870389 [patent_app_country] => US [patent_app_date] => 2004-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 150 [patent_no_of_words] => 28934 [patent_no_of_claims] => 359 [patent_no_of_ind_claims] => 39 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/148/07148082.pdf [firstpage_image] =>[orig_patent_app_number] => 10870389 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/870389
Method of making a semiconductor chip assembly with a press-fit ground plane Jun 16, 2004 Issued
Array ( [id] => 205390 [patent_doc_number] => 07629691 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-12-08 [patent_title] => 'Conductor geometry for electronic circuits fabricated on flexible substrates' [patent_app_type] => utility [patent_app_number] => 10/869404 [patent_app_country] => US [patent_app_date] => 2004-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 2716 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/629/07629691.pdf [firstpage_image] =>[orig_patent_app_number] => 10869404 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869404
Conductor geometry for electronic circuits fabricated on flexible substrates Jun 15, 2004 Issued
Array ( [id] => 6929107 [patent_doc_number] => 20050280140 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-22 [patent_title] => 'Packaging for enhanced thermal and structural performance of electronic chip modules' [patent_app_type] => utility [patent_app_number] => 10/869524 [patent_app_country] => US [patent_app_date] => 2004-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3934 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0280/20050280140.pdf [firstpage_image] =>[orig_patent_app_number] => 10869524 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869524
Packaging for enhanced thermal and structural performance of electronic chip modules Jun 15, 2004 Issued
Array ( [id] => 6903468 [patent_doc_number] => 20050098863 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Lead frame and method for fabricating semiconductor package employing the same' [patent_app_type] => utility [patent_app_number] => 10/866774 [patent_app_country] => US [patent_app_date] => 2004-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4002 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20050098863.pdf [firstpage_image] =>[orig_patent_app_number] => 10866774 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/866774
Lead frame and method for fabricating semiconductor package employing the same Jun 14, 2004 Abandoned
Array ( [id] => 564049 [patent_doc_number] => 07157791 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2007-01-02 [patent_title] => 'Semiconductor chip assembly with press-fit ground plane' [patent_app_type] => utility [patent_app_number] => 10/866393 [patent_app_country] => US [patent_app_date] => 2004-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 150 [patent_no_of_words] => 28916 [patent_no_of_claims] => 210 [patent_no_of_ind_claims] => 65 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/157/07157791.pdf [firstpage_image] =>[orig_patent_app_number] => 10866393 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/866393
Semiconductor chip assembly with press-fit ground plane Jun 10, 2004 Issued
Array ( [id] => 7235312 [patent_doc_number] => 20040256715 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-23 [patent_title] => 'Wiring board, semiconductor device and process of fabricating wiring board' [patent_app_type] => new [patent_app_number] => 10/864334 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3987 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0256/20040256715.pdf [firstpage_image] =>[orig_patent_app_number] => 10864334 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864334
Wiring board, semiconductor device and process of fabricating wiring board Jun 9, 2004 Abandoned
Array ( [id] => 5593817 [patent_doc_number] => 20060157733 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-20 [patent_title] => 'Complex oxides for use in semiconductor devices and related methods' [patent_app_type] => utility [patent_app_number] => 10/560488 [patent_app_country] => US [patent_app_date] => 2004-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12371 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0157/20060157733.pdf [firstpage_image] =>[orig_patent_app_number] => 10560488 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/560488
Complex oxides for use in semiconductor devices and related methods Jun 9, 2004 Abandoned
Array ( [id] => 624000 [patent_doc_number] => 07138710 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-11-21 [patent_title] => 'Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument' [patent_app_type] => utility [patent_app_number] => 10/862373 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 7278 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/138/07138710.pdf [firstpage_image] =>[orig_patent_app_number] => 10862373 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/862373
Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument Jun 7, 2004 Issued
Array ( [id] => 7229000 [patent_doc_number] => 20050269705 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'Semiconductor device and method of manufacture thereof with two or more bond pad connections for each input/output cell' [patent_app_type] => utility [patent_app_number] => 10/863903 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5128 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20050269705.pdf [firstpage_image] =>[orig_patent_app_number] => 10863903 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/863903
Semiconductor device and method of manufacture thereof with two or more bond pad connections for each input/output cell Jun 7, 2004 Issued
Array ( [id] => 519855 [patent_doc_number] => 07193307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-20 [patent_title] => 'Multi-layer FET array and method of fabricating' [patent_app_type] => utility [patent_app_number] => 10/863153 [patent_app_country] => US [patent_app_date] => 2004-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 3105 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/193/07193307.pdf [firstpage_image] =>[orig_patent_app_number] => 10863153 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/863153
Multi-layer FET array and method of fabricating Jun 6, 2004 Issued
Array ( [id] => 7162217 [patent_doc_number] => 20050199998 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-09-15 [patent_title] => 'Semiconductor package with heat sink and method for fabricating the same and stiffener' [patent_app_type] => utility [patent_app_number] => 10/861544 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3163 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0199/20050199998.pdf [firstpage_image] =>[orig_patent_app_number] => 10861544 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/861544
Semiconductor package with heat sink and method for fabricating the same and stiffener Jun 3, 2004 Abandoned
Array ( [id] => 7338598 [patent_doc_number] => 20040245619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Wired circuit board' [patent_app_type] => new [patent_app_number] => 10/860493 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10563 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245619.pdf [firstpage_image] =>[orig_patent_app_number] => 10860493 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/860493
Wired circuit board Jun 3, 2004 Issued
Array ( [id] => 908275 [patent_doc_number] => 07332800 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-19 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/860073 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 42 [patent_figures_cnt] => 47 [patent_no_of_words] => 19268 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/332/07332800.pdf [firstpage_image] =>[orig_patent_app_number] => 10860073 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/860073
Semiconductor device Jun 3, 2004 Issued
Array ( [id] => 609937 [patent_doc_number] => 07151321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-12-19 [patent_title] => 'Laminated electronic component' [patent_app_type] => utility [patent_app_number] => 10/860133 [patent_app_country] => US [patent_app_date] => 2004-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3122 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/151/07151321.pdf [firstpage_image] =>[orig_patent_app_number] => 10860133 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/860133
Laminated electronic component Jun 3, 2004 Issued
Array ( [id] => 7338644 [patent_doc_number] => 20040245635 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-09 [patent_title] => 'Methods for forming contacts in semiconductor devices having local silicide regions and semiconductor devices formed thereby' [patent_app_type] => new [patent_app_number] => 10/858794 [patent_app_country] => US [patent_app_date] => 2004-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3218 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0245/20040245635.pdf [firstpage_image] =>[orig_patent_app_number] => 10858794 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/858794
Methods for forming contacts in semiconductor devices having local silicide regions and semiconductor devices formed thereby Jun 1, 2004 Abandoned
Array ( [id] => 814032 [patent_doc_number] => 07414307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-19 [patent_title] => 'Electronic device and pressure sensor' [patent_app_type] => utility [patent_app_number] => 10/855344 [patent_app_country] => US [patent_app_date] => 2004-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 2690 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/414/07414307.pdf [firstpage_image] =>[orig_patent_app_number] => 10855344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/855344
Electronic device and pressure sensor May 27, 2004 Issued
Array ( [id] => 7206460 [patent_doc_number] => 20050258534 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Arrangement for receiving an electronic component capable of high power operation' [patent_app_type] => utility [patent_app_number] => 10/852314 [patent_app_country] => US [patent_app_date] => 2004-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1875 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258534.pdf [firstpage_image] =>[orig_patent_app_number] => 10852314 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/852314
Arrangement for receiving an electronic component capable of high power operation May 23, 2004 Abandoned
Array ( [id] => 435825 [patent_doc_number] => 07262080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-08-28 [patent_title] => 'BGA package with stacked semiconductor chips and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/850154 [patent_app_country] => US [patent_app_date] => 2004-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 4417 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/262/07262080.pdf [firstpage_image] =>[orig_patent_app_number] => 10850154 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/850154
BGA package with stacked semiconductor chips and method of manufacturing the same May 20, 2004 Issued
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