
Christopher M. Gross
Examiner (ID: 14649, Phone: (571)272-4446 , Office: P/1639 )
| Most Active Art Unit | 1639 |
| Art Unit(s) | 1675, 1684, 1639, 1636 |
| Total Applications | 901 |
| Issued Applications | 468 |
| Pending Applications | 119 |
| Abandoned Applications | 336 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 826843
[patent_doc_number] => 07402508
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-22
[patent_title] => 'Bump structure and method of manufacturing the same, and mounting structure for IC chip and circuit board'
[patent_app_type] => utility
[patent_app_number] => 10/849884
[patent_app_country] => US
[patent_app_date] => 2004-05-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 24
[patent_no_of_words] => 7384
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/402/07402508.pdf
[firstpage_image] =>[orig_patent_app_number] => 10849884
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/849884 | Bump structure and method of manufacturing the same, and mounting structure for IC chip and circuit board | May 20, 2004 | Issued |
Array
(
[id] => 7291870
[patent_doc_number] => 20040212103
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Techniques for pin arrangements in circuit chips'
[patent_app_type] => new
[patent_app_number] => 10/848044
[patent_app_country] => US
[patent_app_date] => 2004-05-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 5956
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0212/20040212103.pdf
[firstpage_image] =>[orig_patent_app_number] => 10848044
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/848044 | Techniques for pin arrangements in circuit chips | May 18, 2004 | Abandoned |
Array
(
[id] => 734267
[patent_doc_number] => 07038307
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-05-02
[patent_title] => 'Semiconductor chip with FIB protection'
[patent_app_type] => utility
[patent_app_number] => 10/846483
[patent_app_country] => US
[patent_app_date] => 2004-05-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 1772
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/038/07038307.pdf
[firstpage_image] =>[orig_patent_app_number] => 10846483
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/846483 | Semiconductor chip with FIB protection | May 12, 2004 | Issued |
Array
(
[id] => 7239091
[patent_doc_number] => 20040257230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Integrated circuit packages with marked product tracking information'
[patent_app_type] => new
[patent_app_number] => 10/843814
[patent_app_country] => US
[patent_app_date] => 2004-05-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2478
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0257/20040257230.pdf
[firstpage_image] =>[orig_patent_app_number] => 10843814
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/843814 | Integrated circuit packages with marked product tracking information | May 11, 2004 | Abandoned |
Array
(
[id] => 655842
[patent_doc_number] => 07109583
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-09-19
[patent_title] => 'Mounting with auxiliary bumps'
[patent_app_type] => utility
[patent_app_number] => 10/841764
[patent_app_country] => US
[patent_app_date] => 2004-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4610
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/109/07109583.pdf
[firstpage_image] =>[orig_patent_app_number] => 10841764
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/841764 | Mounting with auxiliary bumps | May 5, 2004 | Issued |
Array
(
[id] => 6963934
[patent_doc_number] => 20050230831
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-10-20
[patent_title] => 'Structure to improve adhesion between top CVD low-k dielectiric and dielectric capping layer'
[patent_app_type] => utility
[patent_app_number] => 10/827693
[patent_app_country] => US
[patent_app_date] => 2004-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4910
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0230/20050230831.pdf
[firstpage_image] =>[orig_patent_app_number] => 10827693
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/827693 | Structure to improve adhesion between top CVD low-k dielectric and dielectric capping layer | Apr 18, 2004 | Issued |
Array
(
[id] => 7363372
[patent_doc_number] => 20040217466
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-04
[patent_title] => 'Function module and its manufacturing method'
[patent_app_type] => new
[patent_app_number] => 10/827194
[patent_app_country] => US
[patent_app_date] => 2004-04-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3188
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0217/20040217466.pdf
[firstpage_image] =>[orig_patent_app_number] => 10827194
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/827194 | Function module and its manufacturing method | Apr 18, 2004 | Abandoned |
Array
(
[id] => 6981200
[patent_doc_number] => 20050151268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-14
[patent_title] => 'Wafer-level assembly method for chip-size devices having flipped chips'
[patent_app_type] => utility
[patent_app_number] => 10/826713
[patent_app_country] => US
[patent_app_date] => 2004-04-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4919
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20050151268.pdf
[firstpage_image] =>[orig_patent_app_number] => 10826713
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/826713 | Wafer-level assembly method for chip-size devices having flipped chips | Apr 15, 2004 | Abandoned |
Array
(
[id] => 7411817
[patent_doc_number] => 20040207056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-21
[patent_title] => 'Conductor substrate, semiconductor device and production method thereof'
[patent_app_type] => new
[patent_app_number] => 10/824523
[patent_app_country] => US
[patent_app_date] => 2004-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 8985
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0207/20040207056.pdf
[firstpage_image] =>[orig_patent_app_number] => 10824523
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/824523 | Conductor substrate, semiconductor device and production method thereof | Apr 14, 2004 | Issued |
Array
(
[id] => 289363
[patent_doc_number] => 07547979
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-16
[patent_title] => 'Semiconductor device and method of locating a predetermined point on the semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/822384
[patent_app_country] => US
[patent_app_date] => 2004-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2596
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/547/07547979.pdf
[firstpage_image] =>[orig_patent_app_number] => 10822384
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/822384 | Semiconductor device and method of locating a predetermined point on the semiconductor device | Apr 11, 2004 | Issued |
Array
(
[id] => 7291830
[patent_doc_number] => 20040212069
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-10-28
[patent_title] => 'Multi-chips stacked package'
[patent_app_type] => new
[patent_app_number] => 10/820854
[patent_app_country] => US
[patent_app_date] => 2004-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2394
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0212/20040212069.pdf
[firstpage_image] =>[orig_patent_app_number] => 10820854
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/820854 | Multi-chips stacked package | Apr 8, 2004 | Abandoned |
Array
(
[id] => 861406
[patent_doc_number] => 07372159
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-05-13
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/811973
[patent_app_country] => US
[patent_app_date] => 2004-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 22
[patent_no_of_words] => 11253
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/372/07372159.pdf
[firstpage_image] =>[orig_patent_app_number] => 10811973
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/811973 | Semiconductor device | Mar 29, 2004 | Issued |
Array
(
[id] => 7407621
[patent_doc_number] => 20040227252
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-11-18
[patent_title] => 'Flip chip package with reinforced bumps'
[patent_app_type] => new
[patent_app_number] => 10/809384
[patent_app_country] => US
[patent_app_date] => 2004-03-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 1751
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20040227252.pdf
[firstpage_image] =>[orig_patent_app_number] => 10809384
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/809384 | Flip chip package with reinforced bumps | Mar 25, 2004 | Abandoned |
Array
(
[id] => 7334192
[patent_doc_number] => 20040188818
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-09-30
[patent_title] => 'Multi-chips module package'
[patent_app_type] => new
[patent_app_number] => 10/807153
[patent_app_country] => US
[patent_app_date] => 2004-03-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2787
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0188/20040188818.pdf
[firstpage_image] =>[orig_patent_app_number] => 10807153
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/807153 | Multi-chips module package | Mar 23, 2004 | Abandoned |
Array
(
[id] => 630784
[patent_doc_number] => 07132745
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-11-07
[patent_title] => 'Method for attaching shields on substrates'
[patent_app_type] => utility
[patent_app_number] => 10/806644
[patent_app_country] => US
[patent_app_date] => 2004-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 13
[patent_no_of_words] => 1929
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/132/07132745.pdf
[firstpage_image] =>[orig_patent_app_number] => 10806644
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/806644 | Method for attaching shields on substrates | Mar 22, 2004 | Issued |
Array
(
[id] => 6981198
[patent_doc_number] => 20050151266
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-07-14
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 10/806413
[patent_app_country] => US
[patent_app_date] => 2004-03-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7623
[patent_no_of_claims] => 37
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0151/20050151266.pdf
[firstpage_image] =>[orig_patent_app_number] => 10806413
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/806413 | Semiconductor device and method of manufacturing the same | Mar 22, 2004 | Issued |
Array
(
[id] => 756398
[patent_doc_number] => 07019400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-03-28
[patent_title] => 'Semiconductor device having multilayer interconnection structure and method for manufacturing the device'
[patent_app_type] => utility
[patent_app_number] => 10/805403
[patent_app_country] => US
[patent_app_date] => 2004-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 5136
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/019/07019400.pdf
[firstpage_image] =>[orig_patent_app_number] => 10805403
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/805403 | Semiconductor device having multilayer interconnection structure and method for manufacturing the device | Mar 21, 2004 | Issued |
Array
(
[id] => 449721
[patent_doc_number] => 07250634
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-07-31
[patent_title] => 'Light-emitting device, method of manufacturing the same, and display unit'
[patent_app_type] => utility
[patent_app_number] => 10/805133
[patent_app_country] => US
[patent_app_date] => 2004-03-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 27
[patent_no_of_words] => 10424
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/250/07250634.pdf
[firstpage_image] =>[orig_patent_app_number] => 10805133
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/805133 | Light-emitting device, method of manufacturing the same, and display unit | Mar 18, 2004 | Issued |
Array
(
[id] => 7108554
[patent_doc_number] => 20050206007
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-09-22
[patent_title] => 'Structure and method for contact pads having a recessed bondable metal plug over of copper-metallized integrated circuits'
[patent_app_type] => utility
[patent_app_number] => 10/804363
[patent_app_country] => US
[patent_app_date] => 2004-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2983
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0206/20050206007.pdf
[firstpage_image] =>[orig_patent_app_number] => 10804363
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/804363 | Structure and method for contact pads having a recessed bondable metal plug over of copper-metallized integrated circuits | Mar 17, 2004 | Abandoned |
Array
(
[id] => 7058941
[patent_doc_number] => 20050001300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-06
[patent_title] => 'Semiconductor package having multiple embedded chips'
[patent_app_type] => utility
[patent_app_number] => 10/803043
[patent_app_country] => US
[patent_app_date] => 2004-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3159
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0001/20050001300.pdf
[firstpage_image] =>[orig_patent_app_number] => 10803043
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/803043 | Semiconductor package having multiple embedded chips | Mar 17, 2004 | Issued |