Search

Christopher M. Keehan

Examiner (ID: 2037)

Most Active Art Unit
1712
Art Unit(s)
1741, 1712
Total Applications
309
Issued Applications
251
Pending Applications
17
Abandoned Applications
41

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 5010913 [patent_doc_number] => 20070281392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'MULTIPLE ROW EXPOSED LEADS FOR MLP HIGH DENSITY PACKAGES' [patent_app_type] => utility [patent_app_number] => 11/465757 [patent_app_country] => US [patent_app_date] => 2006-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6363 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20070281392.pdf [firstpage_image] =>[orig_patent_app_number] => 11465757 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/465757
Multiple row exposed leads for MLP high density packages Aug 17, 2006 Issued
Array ( [id] => 4496207 [patent_doc_number] => 07956445 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-06-07 [patent_title] => 'Packaged integrated circuit having gold removed from a lead frame' [patent_app_type] => utility [patent_app_number] => 11/464767 [patent_app_country] => US [patent_app_date] => 2006-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2674 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/956/07956445.pdf [firstpage_image] =>[orig_patent_app_number] => 11464767 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/464767
Packaged integrated circuit having gold removed from a lead frame Aug 14, 2006 Issued
Array ( [id] => 820886 [patent_doc_number] => 07408220 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-05 [patent_title] => 'Non-volatile memory and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/463250 [patent_app_country] => US [patent_app_date] => 2006-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 2858 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/408/07408220.pdf [firstpage_image] =>[orig_patent_app_number] => 11463250 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/463250
Non-volatile memory and fabricating method thereof Aug 7, 2006 Issued
Array ( [id] => 5625426 [patent_doc_number] => 20060263931 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-11-23 [patent_title] => 'Wafer Level Packaging of Materials with Different Coefficents of Thermal Expansion' [patent_app_type] => utility [patent_app_number] => 11/461587 [patent_app_country] => US [patent_app_date] => 2006-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4450 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0263/20060263931.pdf [firstpage_image] =>[orig_patent_app_number] => 11461587 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/461587
Wafer level packaging of materials with different coefficients of thermal expansion Jul 31, 2006 Issued
Array ( [id] => 5889227 [patent_doc_number] => 20060276035 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Contact structure and contact liner process' [patent_app_type] => utility [patent_app_number] => 11/495438 [patent_app_country] => US [patent_app_date] => 2006-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2228 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20060276035.pdf [firstpage_image] =>[orig_patent_app_number] => 11495438 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/495438
Process of forming a semiconductor assembly having a contact structure and contact liner Jul 27, 2006 Issued
Array ( [id] => 5885425 [patent_doc_number] => 20060274124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-12-07 [patent_title] => 'Inkjet Printhead Incorporating a Memory Array' [patent_app_type] => utility [patent_app_number] => 11/460267 [patent_app_country] => US [patent_app_date] => 2006-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6258 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0274/20060274124.pdf [firstpage_image] =>[orig_patent_app_number] => 11460267 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/460267
Inkjet Printhead Incorporating a Memory Array Jul 26, 2006 Abandoned
Array ( [id] => 4564396 [patent_doc_number] => 07838971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-23 [patent_title] => 'Method to provide substrate-ground coupling for semiconductor integrated circuit dice constructed from SOI and related materials in stacked-die packages' [patent_app_type] => utility [patent_app_number] => 11/456677 [patent_app_country] => US [patent_app_date] => 2006-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3234 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/838/07838971.pdf [firstpage_image] =>[orig_patent_app_number] => 11456677 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/456677
Method to provide substrate-ground coupling for semiconductor integrated circuit dice constructed from SOI and related materials in stacked-die packages Jul 10, 2006 Issued
Array ( [id] => 303557 [patent_doc_number] => 07534694 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-05-19 [patent_title] => 'Methods of forming a plurality of capacitors' [patent_app_type] => utility [patent_app_number] => 11/477957 [patent_app_country] => US [patent_app_date] => 2006-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 22 [patent_no_of_words] => 4138 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/534/07534694.pdf [firstpage_image] =>[orig_patent_app_number] => 11477957 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/477957
Methods of forming a plurality of capacitors Jun 27, 2006 Issued
Array ( [id] => 5854608 [patent_doc_number] => 20060226541 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-10-12 [patent_title] => 'Electroosmotic pumps using porous frits for cooling integrated circuit stacks' [patent_app_type] => utility [patent_app_number] => 11/448232 [patent_app_country] => US [patent_app_date] => 2006-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3839 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0226/20060226541.pdf [firstpage_image] =>[orig_patent_app_number] => 11448232 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/448232
Method of forming a stack of heat generating integrated circuit chips with intervening cooling integrated circuit chips Jun 6, 2006 Issued
Array ( [id] => 5619563 [patent_doc_number] => 20060189097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Method for manufacturing semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/410073 [patent_app_country] => US [patent_app_date] => 2006-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 9488 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0189/20060189097.pdf [firstpage_image] =>[orig_patent_app_number] => 11410073 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/410073
Method for manufacturing semiconductor device Apr 24, 2006 Issued
Array ( [id] => 840716 [patent_doc_number] => 07391047 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-06-24 [patent_title] => 'System for forming a strained layer of semiconductor material' [patent_app_type] => utility [patent_app_number] => 11/378126 [patent_app_country] => US [patent_app_date] => 2006-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 6231 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 330 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/391/07391047.pdf [firstpage_image] =>[orig_patent_app_number] => 11378126 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/378126
System for forming a strained layer of semiconductor material Mar 16, 2006 Issued
Array ( [id] => 5703254 [patent_doc_number] => 20060192301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-31 [patent_title] => 'Semiconductor device with a protected active die region and method therefor' [patent_app_type] => utility [patent_app_number] => 11/373087 [patent_app_country] => US [patent_app_date] => 2006-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4065 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 19 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20060192301.pdf [firstpage_image] =>[orig_patent_app_number] => 11373087 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/373087
Semiconductor device with a protected active die region and method therefor Mar 9, 2006 Issued
Array ( [id] => 264110 [patent_doc_number] => 07569877 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-04 [patent_title] => 'System and method based on field-effect transistors for addressing nanometer-scale devices' [patent_app_type] => utility [patent_app_number] => 11/361120 [patent_app_country] => US [patent_app_date] => 2006-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 8870 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/569/07569877.pdf [firstpage_image] =>[orig_patent_app_number] => 11361120 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/361120
System and method based on field-effect transistors for addressing nanometer-scale devices Feb 23, 2006 Issued
Array ( [id] => 5616877 [patent_doc_number] => 20060186409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-24 [patent_title] => 'Liquid crystal display device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/351488 [patent_app_country] => US [patent_app_date] => 2006-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4997 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20060186409.pdf [firstpage_image] =>[orig_patent_app_number] => 11351488 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/351488
Method for manufacturing a Liquid crystal display device Feb 8, 2006 Issued
Array ( [id] => 810059 [patent_doc_number] => 07416947 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-08-26 [patent_title] => 'Method of fabricating trench MIS device with thick oxide layer in bottom of trench' [patent_app_type] => utility [patent_app_number] => 11/335747 [patent_app_country] => US [patent_app_date] => 2006-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 40 [patent_no_of_words] => 7145 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/416/07416947.pdf [firstpage_image] =>[orig_patent_app_number] => 11335747 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/335747
Method of fabricating trench MIS device with thick oxide layer in bottom of trench Jan 18, 2006 Issued
Array ( [id] => 4701771 [patent_doc_number] => 20080061293 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'Semiconductor Device with Heterojunctions and an Inter-Finger Structure' [patent_app_type] => utility [patent_app_number] => 11/813676 [patent_app_country] => US [patent_app_date] => 2006-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7389 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20080061293.pdf [firstpage_image] =>[orig_patent_app_number] => 11813676 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/813676
Semiconductor device with heterojunctions and an inter-finger structure Jan 17, 2006 Issued
Array ( [id] => 5628804 [patent_doc_number] => 20060145272 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Mask ROM and fabricating method thereof' [patent_app_type] => utility [patent_app_number] => 11/319497 [patent_app_country] => US [patent_app_date] => 2005-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2806 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145272.pdf [firstpage_image] =>[orig_patent_app_number] => 11319497 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/319497
Method of fabricating a mask ROM Dec 28, 2005 Issued
Array ( [id] => 5293732 [patent_doc_number] => 20090008658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'Infrared Emitting Diode and Method of Its Manufacture' [patent_app_type] => utility [patent_app_number] => 11/813321 [patent_app_country] => US [patent_app_date] => 2005-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4612 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0008/20090008658.pdf [firstpage_image] =>[orig_patent_app_number] => 11813321 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/813321
Infrared emitting diode and method of its manufacture Dec 25, 2005 Issued
Array ( [id] => 5628776 [patent_doc_number] => 20060145244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Sonos device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/314317 [patent_app_country] => US [patent_app_date] => 2005-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2104 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20060145244.pdf [firstpage_image] =>[orig_patent_app_number] => 11314317 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/314317
Method of manufacturing a SONOS device Dec 21, 2005 Issued
Array ( [id] => 1076957 [patent_doc_number] => 07615470 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-11-10 [patent_title] => 'Method of manufacturing gallium nitride semiconductor' [patent_app_type] => utility [patent_app_number] => 11/302957 [patent_app_country] => US [patent_app_date] => 2005-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3532 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/615/07615470.pdf [firstpage_image] =>[orig_patent_app_number] => 11302957 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/302957
Method of manufacturing gallium nitride semiconductor Dec 12, 2005 Issued
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