Search

Christopher M. Koehler

Examiner (ID: 10870)

Most Active Art Unit
3726
Art Unit(s)
2834, 3726
Total Applications
942
Issued Applications
549
Pending Applications
30
Abandoned Applications
362

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3848684 [patent_doc_number] => 05745063 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Arrangement for the summation of products of signals' [patent_app_type] => 1 [patent_app_number] => 8/867205 [patent_app_country] => US [patent_app_date] => 1997-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5990 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745063.pdf [firstpage_image] =>[orig_patent_app_number] => 867205 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/867205
Arrangement for the summation of products of signals Jun 1, 1997 Issued
Array ( [id] => 3832469 [patent_doc_number] => 05731772 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Method and apparatus for compensation for a DC voltage offset of a digital to analog converter' [patent_app_type] => 1 [patent_app_number] => 8/790399 [patent_app_country] => US [patent_app_date] => 1997-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/731/05731772.pdf [firstpage_image] =>[orig_patent_app_number] => 790399 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/790399
Method and apparatus for compensation for a DC voltage offset of a digital to analog converter Jan 28, 1997 Issued
Array ( [id] => 3833292 [patent_doc_number] => 05784016 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-21 [patent_title] => 'Self-calibration technique for pipe line A/D converters' [patent_app_type] => 1 [patent_app_number] => 8/742963 [patent_app_country] => US [patent_app_date] => 1996-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2056 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/784/05784016.pdf [firstpage_image] =>[orig_patent_app_number] => 742963 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/742963
Self-calibration technique for pipe line A/D converters Oct 31, 1996 Issued
Array ( [id] => 3735724 [patent_doc_number] => 05703588 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-30 [patent_title] => 'Digital to analog converter with dual resistor string' [patent_app_type] => 1 [patent_app_number] => 8/730592 [patent_app_country] => US [patent_app_date] => 1996-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7666 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/703/05703588.pdf [firstpage_image] =>[orig_patent_app_number] => 730592 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/730592
Digital to analog converter with dual resistor string Oct 14, 1996 Issued
Array ( [id] => 3762696 [patent_doc_number] => 05721548 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Analog-to-digital converter for compensating for input bias current of comparator' [patent_app_type] => 1 [patent_app_number] => 8/720996 [patent_app_country] => US [patent_app_date] => 1996-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2169 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721548.pdf [firstpage_image] =>[orig_patent_app_number] => 720996 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/720996
Analog-to-digital converter for compensating for input bias current of comparator Oct 13, 1996 Issued
Array ( [id] => 3838801 [patent_doc_number] => 05739781 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Sub-ranging analog-to-digital converter with open-loop differential amplifiers' [patent_app_type] => 1 [patent_app_number] => 8/727056 [patent_app_country] => US [patent_app_date] => 1996-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 17 [patent_no_of_words] => 9603 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/739/05739781.pdf [firstpage_image] =>[orig_patent_app_number] => 727056 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/727056
Sub-ranging analog-to-digital converter with open-loop differential amplifiers Oct 7, 1996 Issued
Array ( [id] => 3895007 [patent_doc_number] => 05724033 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-03 [patent_title] => 'Method for encoding delta values' [patent_app_type] => 1 [patent_app_number] => 8/695059 [patent_app_country] => US [patent_app_date] => 1996-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 17171 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 251 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/724/05724033.pdf [firstpage_image] =>[orig_patent_app_number] => 695059 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/695059
Method for encoding delta values Aug 8, 1996 Issued
Array ( [id] => 3738042 [patent_doc_number] => 05666118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Self calibration segmented digital-to-analog converter' [patent_app_type] => 1 [patent_app_number] => 8/688452 [patent_app_country] => US [patent_app_date] => 1996-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5536 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666118.pdf [firstpage_image] =>[orig_patent_app_number] => 688452 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/688452
Self calibration segmented digital-to-analog converter Jul 29, 1996 Issued
Array ( [id] => 3848743 [patent_doc_number] => 05745067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-28 [patent_title] => 'Two stage analoge-to-digital converter having unique fine encoding circuitry' [patent_app_type] => 1 [patent_app_number] => 8/682455 [patent_app_country] => US [patent_app_date] => 1996-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 3211 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 468 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/745/05745067.pdf [firstpage_image] =>[orig_patent_app_number] => 682455 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/682455
Two stage analoge-to-digital converter having unique fine encoding circuitry Jul 16, 1996 Issued
Array ( [id] => 3768074 [patent_doc_number] => 05742249 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'System using a digital timer for a joystick potentiometer readout' [patent_app_type] => 1 [patent_app_number] => 8/652955 [patent_app_country] => US [patent_app_date] => 1996-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1775 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742249.pdf [firstpage_image] =>[orig_patent_app_number] => 652955 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/652955
System using a digital timer for a joystick potentiometer readout May 23, 1996 Issued
Array ( [id] => 3882705 [patent_doc_number] => 05764165 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Rotated counter bit pulse width modulated digital to analog converter' [patent_app_type] => 1 [patent_app_number] => 8/642754 [patent_app_country] => US [patent_app_date] => 1996-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 2951 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/764/05764165.pdf [firstpage_image] =>[orig_patent_app_number] => 642754 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/642754
Rotated counter bit pulse width modulated digital to analog converter May 2, 1996 Issued
Array ( [id] => 3797590 [patent_doc_number] => 05841380 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Variable length decoder and method for decoding two codes per clock cycle' [patent_app_type] => 1 [patent_app_number] => 8/623651 [patent_app_country] => US [patent_app_date] => 1996-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 9229 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841380.pdf [firstpage_image] =>[orig_patent_app_number] => 623651 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/623651
Variable length decoder and method for decoding two codes per clock cycle Mar 28, 1996 Issued
Array ( [id] => 3738428 [patent_doc_number] => 05694126 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-02 [patent_title] => 'Adaptive predictive data compression method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/617453 [patent_app_country] => US [patent_app_date] => 1996-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 14922 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/694/05694126.pdf [firstpage_image] =>[orig_patent_app_number] => 617453 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/617453
Adaptive predictive data compression method and apparatus Mar 17, 1996 Issued
Array ( [id] => 3793706 [patent_doc_number] => 05736953 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-07 [patent_title] => 'A/D converter having a reduced response time and reduced power consumption' [patent_app_type] => 1 [patent_app_number] => 8/616353 [patent_app_country] => US [patent_app_date] => 1996-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 6048 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/736/05736953.pdf [firstpage_image] =>[orig_patent_app_number] => 616353 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/616353
A/D converter having a reduced response time and reduced power consumption Mar 14, 1996 Issued
Array ( [id] => 3655234 [patent_doc_number] => 05684482 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-04 [patent_title] => 'Spectral shaping of circuit errors in digital-to-analog converters' [patent_app_type] => 1 [patent_app_number] => 8/610557 [patent_app_country] => US [patent_app_date] => 1996-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 7543 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/684/05684482.pdf [firstpage_image] =>[orig_patent_app_number] => 610557 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/610557
Spectral shaping of circuit errors in digital-to-analog converters Mar 5, 1996 Issued
Array ( [id] => 3864422 [patent_doc_number] => 05706008 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-06 [patent_title] => 'High bandwidth parallel analog-to-digital converter' [patent_app_type] => 1 [patent_app_number] => 8/609651 [patent_app_country] => US [patent_app_date] => 1996-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 6426 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/706/05706008.pdf [firstpage_image] =>[orig_patent_app_number] => 609651 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/609651
High bandwidth parallel analog-to-digital converter Feb 29, 1996 Issued
Array ( [id] => 3700798 [patent_doc_number] => 05661483 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-26 [patent_title] => 'Area integrator servo demodulator with on-chip CMOS analog-to-digital converter' [patent_app_type] => 1 [patent_app_number] => 8/609266 [patent_app_country] => US [patent_app_date] => 1996-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4741 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/661/05661483.pdf [firstpage_image] =>[orig_patent_app_number] => 609266 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/609266
Area integrator servo demodulator with on-chip CMOS analog-to-digital converter Feb 28, 1996 Issued
Array ( [id] => 3888045 [patent_doc_number] => 05798724 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-25 [patent_title] => 'Interpolating digital to analog converter architecture for improved spurious signal suppression' [patent_app_type] => 1 [patent_app_number] => 8/601401 [patent_app_country] => US [patent_app_date] => 1996-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2366 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/798/05798724.pdf [firstpage_image] =>[orig_patent_app_number] => 601401 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/601401
Interpolating digital to analog converter architecture for improved spurious signal suppression Feb 13, 1996 Issued
Array ( [id] => 3762682 [patent_doc_number] => 05721547 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-24 [patent_title] => 'Analog-to-digital converter employing DC offset cancellation after modulation and before digital processing' [patent_app_type] => 1 [patent_app_number] => 8/582644 [patent_app_country] => US [patent_app_date] => 1996-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4927 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/721/05721547.pdf [firstpage_image] =>[orig_patent_app_number] => 582644 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582644
Analog-to-digital converter employing DC offset cancellation after modulation and before digital processing Jan 3, 1996 Issued
Array ( [id] => 3819767 [patent_doc_number] => 05710561 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Method and apparatus for double run-length encoding of binary data' [patent_app_type] => 1 [patent_app_number] => 8/582150 [patent_app_country] => US [patent_app_date] => 1996-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7089 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710561.pdf [firstpage_image] =>[orig_patent_app_number] => 582150 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582150
Method and apparatus for double run-length encoding of binary data Jan 1, 1996 Issued
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