
Christopher O. Onuaku
Examiner (ID: 11271)
| Most Active Art Unit | 2615 |
| Art Unit(s) | 2615, 2616, 2712, 2604, 2621, 2715 |
| Total Applications | 508 |
| Issued Applications | 436 |
| Pending Applications | 23 |
| Abandoned Applications | 49 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6280542
[patent_doc_number] => 20100155911
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-06-24
[patent_title] => 'ESD Protection Diode in RF pads'
[patent_app_type] => utility
[patent_app_number] => 12/453067
[patent_app_country] => US
[patent_app_date] => 2009-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3119
[patent_no_of_claims] => 15
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20100155911.pdf
[firstpage_image] =>[orig_patent_app_number] => 12453067
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/453067 | ESD Protection Diode in RF pads | Apr 27, 2009 | Abandoned |
Array
(
[id] => 4499530
[patent_doc_number] => 07948068
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-05-24
[patent_title] => 'Semiconductor device having a chip mounting portion and a plurality of suspending leads supporting the chip mounting portion and each suspension lead having a bent portion'
[patent_app_type] => utility
[patent_app_number] => 12/401075
[patent_app_country] => US
[patent_app_date] => 2009-03-10
[patent_effective_date] => 0000-00-00
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[patent_words_short_claim] => 188
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/948/07948068.pdf
[firstpage_image] =>[orig_patent_app_number] => 12401075
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/401075 | Semiconductor device having a chip mounting portion and a plurality of suspending leads supporting the chip mounting portion and each suspension lead having a bent portion | Mar 9, 2009 | Issued |
Array
(
[id] => 7730734
[patent_doc_number] => 08101964
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-24
[patent_title] => 'Semiconductor light-emitting element and process for production thereof'
[patent_app_type] => utility
[patent_app_number] => 12/363198
[patent_app_country] => US
[patent_app_date] => 2009-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 7057
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/101/08101964.pdf
[firstpage_image] =>[orig_patent_app_number] => 12363198
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/363198 | Semiconductor light-emitting element and process for production thereof | Jan 29, 2009 | Issued |
Array
(
[id] => 6432635
[patent_doc_number] => 20100187602
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'METHODS FOR MAKING SEMICONDUCTOR DEVICES USING NITRIDE CONSUMPTION LOCOS OXIDATION'
[patent_app_type] => utility
[patent_app_number] => 12/362321
[patent_app_country] => US
[patent_app_date] => 2009-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 4935
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[pdf_file] => publications/A1/0187/20100187602.pdf
[firstpage_image] =>[orig_patent_app_number] => 12362321
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/362321 | METHODS FOR MAKING SEMICONDUCTOR DEVICES USING NITRIDE CONSUMPTION LOCOS OXIDATION | Jan 28, 2009 | Abandoned |
Array
(
[id] => 5583173
[patent_doc_number] => 20090102375
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-23
[patent_title] => 'THIN FILM TRANSISTOR AND ORGANIC ELECTRO-LUMINESCENT DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/345666
[patent_app_country] => US
[patent_app_date] => 2008-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 5486
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[pdf_file] => publications/A1/0102/20090102375.pdf
[firstpage_image] =>[orig_patent_app_number] => 12345666
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/345666 | Thin film transistor and organic electro-luminescent display device | Dec 29, 2008 | Issued |
Array
(
[id] => 5499305
[patent_doc_number] => 20090159993
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-25
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 12/334506
[patent_app_country] => US
[patent_app_date] => 2008-12-14
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0159/20090159993.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/334506 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME | Dec 13, 2008 | Abandoned |
Array
(
[id] => 4460428
[patent_doc_number] => 07879719
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Interconnect structure and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/334505
[patent_app_country] => US
[patent_app_date] => 2008-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
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[patent_no_of_words] => 2371
[patent_no_of_claims] => 17
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[pdf_file] => patents/07/879/07879719.pdf
[firstpage_image] =>[orig_patent_app_number] => 12334505
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/334505 | Interconnect structure and method of manufacturing the same | Dec 13, 2008 | Issued |
Array
(
[id] => 6570142
[patent_doc_number] => 20100273317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-10-28
[patent_title] => 'METHOD OF GROWING, ON A DIELETRIC MATERIAL, NANOWIRES MADE OF SEMI-CONDUCTOR MATERIALS CONNECTING TWO ELECTRODES'
[patent_app_type] => utility
[patent_app_number] => 12/743852
[patent_app_country] => US
[patent_app_date] => 2008-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1902
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[pdf_file] => publications/A1/0273/20100273317.pdf
[firstpage_image] =>[orig_patent_app_number] => 12743852
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/743852 | Method of growing, on a dielectric material, nanowires made of semi-conductor materials connecting two electrodes | Nov 26, 2008 | Issued |
Array
(
[id] => 143235
[patent_doc_number] => 07692308
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-06
[patent_title] => 'Microelectronic circuit structure with layered low dielectric constant regions'
[patent_app_type] => utility
[patent_app_number] => 12/256735
[patent_app_country] => US
[patent_app_date] => 2008-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[pdf_file] => patents/07/692/07692308.pdf
[firstpage_image] =>[orig_patent_app_number] => 12256735
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/256735 | Microelectronic circuit structure with layered low dielectric constant regions | Oct 22, 2008 | Issued |
Array
(
[id] => 4460338
[patent_doc_number] => 07879691
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-02-01
[patent_title] => 'Low cost die placement'
[patent_app_type] => utility
[patent_app_number] => 12/236972
[patent_app_country] => US
[patent_app_date] => 2008-09-24
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/07/879/07879691.pdf
[firstpage_image] =>[orig_patent_app_number] => 12236972
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/236972 | Low cost die placement | Sep 23, 2008 | Issued |
Array
(
[id] => 4949460
[patent_doc_number] => 20080305586
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-12-11
[patent_title] => 'METHOD OF MANUACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/191503
[patent_app_country] => US
[patent_app_date] => 2008-08-14
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/191503 | Method of manufacturing a semiconductor device | Aug 13, 2008 | Issued |
Array
(
[id] => 4859760
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[patent_title] => 'METHODS AND SEMICONDUCTOR STRUCTURES FOR LATCH-UP SUPPRESSION USING A CONDUCTIVE REGION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/169806 | Methods and semiconductor structures for latch-up suppression using a conductive region | Jul 8, 2008 | Issued |
Array
(
[id] => 4695514
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[patent_title] => 'METHODS AND SEMICONDUCTOR STRUCTURES FOR LATCH-UP SUPPRESSION USING A CONDUCTIVE REGION'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/125381 | Methods and semiconductor structures for latch-up suppression using a conductive region | May 21, 2008 | Issued |
Array
(
[id] => 5488278
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[patent_issue_date] => 2009-11-26
[patent_title] => 'HERMETIC SEALING OF MICRO DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/124962
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Array
(
[id] => 295946
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[patent_title] => 'Image sensor and method for manufacturing the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/122172 | Image sensor and method for manufacturing the same | May 15, 2008 | Issued |
Array
(
[id] => 102504
[patent_doc_number] => 07723240
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[patent_kind] => B2
[patent_issue_date] => 2010-05-25
[patent_title] => 'Methods of low temperature oxidation'
[patent_app_type] => utility
[patent_app_number] => 12/121382
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Array
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Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/052871 | Method of making and designing lead frames for semiconductor packages | Mar 20, 2008 | Issued |
Array
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