Search

Christopher R. Stone

Examiner (ID: 16984, Phone: (571)270-3494 , Office: P/1628 )

Most Active Art Unit
1628
Art Unit(s)
4173, 1628, 1614, 1609
Total Applications
750
Issued Applications
250
Pending Applications
42
Abandoned Applications
457

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15370207 [patent_doc_number] => 20200020868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => ORGANIC ELECTROLUMINESCENT ELEMENT [patent_app_type] => utility [patent_app_number] => 16/578658 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14521 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16578658 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/578658
Organic electroluminescent element Sep 22, 2019 Issued
Array ( [id] => 16759918 [patent_doc_number] => 10978475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Three-dimensional semiconductor memory device [patent_app_type] => utility [patent_app_number] => 16/570106 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 35 [patent_no_of_words] => 9744 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570106 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570106
Three-dimensional semiconductor memory device Sep 12, 2019 Issued
Array ( [id] => 15218503 [patent_doc_number] => 20190371938 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => INSULATED GATE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME [patent_app_type] => utility [patent_app_number] => 16/546243 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10077 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16546243 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/546243
Insulated gate semiconductor device and method of manufacturing same Aug 19, 2019 Issued
Array ( [id] => 16653351 [patent_doc_number] => 10930544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-23 [patent_title] => Method of manufacturing semiconductor device having buried gate electrodes [patent_app_type] => utility [patent_app_number] => 16/540228 [patent_app_country] => US [patent_app_date] => 2019-08-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 11954 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16540228 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/540228
Method of manufacturing semiconductor device having buried gate electrodes Aug 13, 2019 Issued
Array ( [id] => 16593792 [patent_doc_number] => 10903069 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Method of fabricating layered structure [patent_app_type] => utility [patent_app_number] => 16/537348 [patent_app_country] => US [patent_app_date] => 2019-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 4627 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16537348 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/537348
Method of fabricating layered structure Aug 8, 2019 Issued
Array ( [id] => 15461859 [patent_doc_number] => 20200043754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-06 [patent_title] => PROTECTIVE MEMBER FORMING APPARATUS [patent_app_type] => utility [patent_app_number] => 16/527692 [patent_app_country] => US [patent_app_date] => 2019-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5308 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16527692 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/527692
Protective member forming apparatus Jul 30, 2019 Issued
Array ( [id] => 16593821 [patent_doc_number] => 10903098 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Substrate processing system and substrate processing apparatus [patent_app_type] => utility [patent_app_number] => 16/526712 [patent_app_country] => US [patent_app_date] => 2019-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 24 [patent_no_of_words] => 16188 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16526712 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/526712
Substrate processing system and substrate processing apparatus Jul 29, 2019 Issued
Array ( [id] => 15027145 [patent_doc_number] => 20190324577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => INTEGRATED LIGHT-EMITTING PIXEL ARRAYS BASED DEVICES BY BONDING [patent_app_type] => utility [patent_app_number] => 16/459431 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25327 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -35 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459431 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459431
Integrated light-emitting pixel arrays based devices by bonding Jun 30, 2019 Issued
Array ( [id] => 16638121 [patent_doc_number] => 10916637 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Method of forming gate spacer for nanowire FET device [patent_app_type] => utility [patent_app_number] => 16/435411 [patent_app_country] => US [patent_app_date] => 2019-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 5226 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16435411 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/435411
Method of forming gate spacer for nanowire FET device Jun 6, 2019 Issued
Array ( [id] => 14996253 [patent_doc_number] => 20190317084 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-17 [patent_title] => Method of Making an Integrated Circuit for a Single-Molecule Nucleic-Acid Assay Platform [patent_app_type] => utility [patent_app_number] => 16/427749 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9877 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -31 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427749 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427749
Method of making an integrated circuit for a single-molecule nucleic-acid assay platform May 30, 2019 Issued
Array ( [id] => 15889937 [patent_doc_number] => 10651327 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Thin film photovoltaic cell with back contacts [patent_app_type] => utility [patent_app_number] => 16/427534 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 4457 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16427534 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/427534
Thin film photovoltaic cell with back contacts May 30, 2019 Issued
Array ( [id] => 15840943 [patent_doc_number] => 20200135754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/407936 [patent_app_country] => US [patent_app_date] => 2019-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8899 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16407936 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/407936
Method of manufacturing a semiconductor device May 8, 2019 Issued
Array ( [id] => 14785239 [patent_doc_number] => 20190267517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-29 [patent_title] => ELECTRO-OPTICAL DEVICE, METHOD FOR MANUFACTURING ELECTRO-OPTICAL DEVICE, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 16/406068 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9989 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406068 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406068
Electro-optical device, method for manufacturing electro-optical device, and electronic apparatus May 7, 2019 Issued
Array ( [id] => 15299905 [patent_doc_number] => 20190393088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => METHOD OF REDUCING RESIDUAL CONTAMINATION IN SINGULATED SEMICONDUCTOR DIE [patent_app_type] => utility [patent_app_number] => 16/405168 [patent_app_country] => US [patent_app_date] => 2019-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5938 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16405168 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/405168
Method of reducing residual contamination in singulated semiconductor die May 6, 2019 Issued
Array ( [id] => 15154845 [patent_doc_number] => 20190355900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => CRYOGENIC OXIDATION OF METAL LAYER OF MAGNETIC-TUNNEL-JUNCTION (MTJ) DEVICE [patent_app_type] => utility [patent_app_number] => 16/403320 [patent_app_country] => US [patent_app_date] => 2019-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7500 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16403320 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/403320
Cryogenic oxidation of metal layer of magnetic-tunnel-junction (MTJ) device May 2, 2019 Issued
Array ( [id] => 14753375 [patent_doc_number] => 20190259861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-22 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD [patent_app_type] => utility [patent_app_number] => 16/397859 [patent_app_country] => US [patent_app_date] => 2019-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8508 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16397859 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/397859
Semiconductor device and method Apr 28, 2019 Issued
Array ( [id] => 16536683 [patent_doc_number] => 10879297 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Image sensor device and method of forming same [patent_app_type] => utility [patent_app_number] => 16/388071 [patent_app_country] => US [patent_app_date] => 2019-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3756 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16388071 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/388071
Image sensor device and method of forming same Apr 17, 2019 Issued
Array ( [id] => 16820194 [patent_doc_number] => 11005035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Magnetoresistive effect element [patent_app_type] => utility [patent_app_number] => 16/364905 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 13849 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364905 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364905
Magnetoresistive effect element Mar 25, 2019 Issued
Array ( [id] => 16536678 [patent_doc_number] => 10879292 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Semiconductor package and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/364237 [patent_app_country] => US [patent_app_date] => 2019-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 40 [patent_no_of_words] => 11723 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16364237 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/364237
Semiconductor package and method of manufacturing the same Mar 25, 2019 Issued
Array ( [id] => 16293707 [patent_doc_number] => 10770563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-08 [patent_title] => Gate structure and patterning method for multiple threshold voltages [patent_app_type] => utility [patent_app_number] => 16/363109 [patent_app_country] => US [patent_app_date] => 2019-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16363109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/363109
Gate structure and patterning method for multiple threshold voltages Mar 24, 2019 Issued
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