Christopher R. Stone

Array ( [id] => 7738824 [patent_doc_number] => 20120018809 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-26 [patent_title] => 'MOS DEVICE FOR ELIMINATING FLOATING BODY EFFECTS AND SELF-HEATING EFFECTS' [patent_app_type] => utility [patent_app_number] => 13/127276 [patent_app_country] => US [patent_app_date] => 2010-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2737 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0018/20120018809.pdf [firstpage_image] =>[orig_patent_app_number] => 13127276 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9441436 [patent_doc_number] => 08710549 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'MOS device for eliminating floating body effects and self-heating effects' [patent_app_type] => utility [patent_app_number] => 13/128439 [patent_app_country] => US [patent_app_date] => 2010-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2784 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13128439 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6327731 [patent_doc_number] => 20100327359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/873495 [patent_app_country] => US [patent_app_date] => 2010-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 12273 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20100327359.pdf [firstpage_image] =>[orig_patent_app_number] => 12873495 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6024989 [patent_doc_number] => 20110053315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'ORGANIC THIN FILM TRANSISTOR SUBSTRATE AND FABRICATION METHOD THEREFOR' [patent_app_type] => utility [patent_app_number] => 12/871642 [patent_app_country] => US [patent_app_date] => 2010-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4666 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20110053315.pdf [firstpage_image] =>[orig_patent_app_number] => 12871642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7795811 [patent_doc_number] => 08124517 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-02-28 [patent_title] => 'Method of forming an interconnect joint' [patent_app_type] => utility [patent_app_number] => 12/837574 [patent_app_country] => US [patent_app_date] => 2010-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3415 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/124/08124517.pdf [firstpage_image] =>[orig_patent_app_number] => 12837574 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8701436 [patent_doc_number] => 08394656 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-12 [patent_title] => 'Method of creating MEMS device cavities by a non-etching process' [patent_app_type] => utility [patent_app_number] => 12/831898 [patent_app_country] => US [patent_app_date] => 2010-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 9549 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12831898 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9059775 [patent_doc_number] => 08546210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-01 [patent_title] => 'Semiconductor device and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/794120 [patent_app_country] => US [patent_app_date] => 2010-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 34 [patent_no_of_words] => 13598 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12794120 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8749885 [patent_doc_number] => 08415718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Method of forming epi film in substrate trench' [patent_app_type] => utility [patent_app_number] => 12/784207 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5068 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12784207 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8808353 [patent_doc_number] => 08446007 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Non-uniform alignment of wafer bumps with substrate solders' [patent_app_type] => utility [patent_app_number] => 12/784327 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 3133 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12784327 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10106750 [patent_doc_number] => 09142533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Substrate interconnections having different sizes' [patent_app_type] => utility [patent_app_number] => 12/784266 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 4844 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12784266 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8834980 [patent_doc_number] => 08450737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-28 [patent_title] => 'Thin film transistor array panel and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/784376 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 25 [patent_no_of_words] => 9266 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12784376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6368841 [patent_doc_number] => 20100314704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'SOLID-STATE IMAGING DEVICE AND METHOD FOR MAKING THE SAME, AND IMAGING APPARATUS' [patent_app_type] => utility [patent_app_number] => 12/783227 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6192 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20100314704.pdf [firstpage_image] =>[orig_patent_app_number] => 12783227 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8578266 [patent_doc_number] => 08344477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-01 [patent_title] => 'Semiconductor chip, semiconductor wafer, method of manufacturing semiconductor chip' [patent_app_type] => utility [patent_app_number] => 12/801054 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 9128 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12801054 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6368677 [patent_doc_number] => 20100314674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/783189 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 4366 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20100314674.pdf [firstpage_image] =>[orig_patent_app_number] => 12783189 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7564903 [patent_doc_number] => 20110284966 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'Structure and Method for Alignment Marks' [patent_app_type] => utility [patent_app_number] => 12/783200 [patent_app_country] => US [patent_app_date] => 2010-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0284/20110284966.pdf [firstpage_image] =>[orig_patent_app_number] => 12783200 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6176253 [patent_doc_number] => 20110177636 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-21 [patent_title] => 'MANUFACTURING PROCESS FOR SOLID STATE LIGHTING DEVICE ON A CONDUCTIVE SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 12/782080 [patent_app_country] => US [patent_app_date] => 2010-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 7262 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20110177636.pdf [firstpage_image] =>[orig_patent_app_number] => 12782080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6368612 [patent_doc_number] => 20100314667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'CMOS PIXEL WITH DUAL-ELEMENT TRANSFER GATE' [patent_app_type] => utility [patent_app_number] => 12/781638 [patent_app_country] => US [patent_app_date] => 2010-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4665 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20100314667.pdf [firstpage_image] =>[orig_patent_app_number] => 12781638 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8785150 [patent_doc_number] => 08431995 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-30 [patent_title] => 'Methodology for fabricating isotropically recessed drain regions of CMOS transistors' [patent_app_type] => utility [patent_app_number] => 12/779087 [patent_app_country] => US [patent_app_date] => 2010-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3180 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 281 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12779087 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4609036 [patent_doc_number] => 07994068 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Method for fabricating a 3-D integrated circuit using a hard mask of silicon-oxynitride on amorphous carbon' [patent_app_type] => utility [patent_app_number] => 12/750596 [patent_app_country] => US [patent_app_date] => 2010-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 7377 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/994/07994068.pdf [firstpage_image] =>[orig_patent_app_number] => 12750596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9402340 [patent_doc_number] => 08692394 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-08 [patent_title] => 'Adhesive for semiconductor bonding, adhesive film for semiconductor bonding, method for mounting semiconductor chip, and semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/499134 [patent_app_country] => US [patent_app_date] => 2010-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12117 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13499134 [rel_patent_id] =>[rel_patent_doc_number] =>)