Search

Christopher Upton

Examiner (ID: 14885)

Most Active Art Unit
1778
Art Unit(s)
1308, 1797, 1778, 1776, 1306, 1724
Total Applications
3146
Issued Applications
2580
Pending Applications
123
Abandoned Applications
451

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4361842 [patent_doc_number] => 06292061 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Low-voltage CMOS phase-locked loop (PLL) for high-performance microprocessor clock generation' [patent_app_type] => 1 [patent_app_number] => 9/562055 [patent_app_country] => US [patent_app_date] => 2000-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2931 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292061.pdf [firstpage_image] =>[orig_patent_app_number] => 562055 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/562055
Low-voltage CMOS phase-locked loop (PLL) for high-performance microprocessor clock generation Apr 30, 2000 Issued
Array ( [id] => 4390739 [patent_doc_number] => 06278338 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-21 [patent_title] => 'Crystal oscillator with peak detector amplitude control' [patent_app_type] => 1 [patent_app_number] => 9/562835 [patent_app_country] => US [patent_app_date] => 2000-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5797 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/278/06278338.pdf [firstpage_image] =>[orig_patent_app_number] => 562835 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/562835
Crystal oscillator with peak detector amplitude control Apr 30, 2000 Issued
Array ( [id] => 1563816 [patent_doc_number] => 06362697 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-26 [patent_title] => 'Low supply voltage relaxation oscillator having current mirror transistors supply for capacitors' [patent_app_type] => B1 [patent_app_number] => 09/561425 [patent_app_country] => US [patent_app_date] => 2000-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3447 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/362/06362697.pdf [firstpage_image] =>[orig_patent_app_number] => 09561425 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/561425
Low supply voltage relaxation oscillator having current mirror transistors supply for capacitors Apr 27, 2000 Issued
Array ( [id] => 4361934 [patent_doc_number] => 06292067 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Ask modulator and communication device using the same' [patent_app_type] => 1 [patent_app_number] => 9/560088 [patent_app_country] => US [patent_app_date] => 2000-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 2931 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292067.pdf [firstpage_image] =>[orig_patent_app_number] => 560088 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/560088
Ask modulator and communication device using the same Apr 27, 2000 Issued
Array ( [id] => 1462308 [patent_doc_number] => 06392496 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Digital PLL circuit having a look-up table and method thereof' [patent_app_type] => B1 [patent_app_number] => 09/558208 [patent_app_country] => US [patent_app_date] => 2000-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/392/06392496.pdf [firstpage_image] =>[orig_patent_app_number] => 09558208 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/558208
Digital PLL circuit having a look-up table and method thereof Apr 25, 2000 Issued
Array ( [id] => 4294650 [patent_doc_number] => 06268780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-31 [patent_title] => 'Frequency synthesizer with digital frequency lock loop' [patent_app_type] => 1 [patent_app_number] => 9/558927 [patent_app_country] => US [patent_app_date] => 2000-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 2905 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/268/06268780.pdf [firstpage_image] =>[orig_patent_app_number] => 558927 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/558927
Frequency synthesizer with digital frequency lock loop Apr 25, 2000 Issued
09/552747 Reduced distortion digital FM demodulator Apr 19, 2000 Abandoned
Array ( [id] => 4326999 [patent_doc_number] => 06249180 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Phase noise and additive noise estimation in a QAM demodulator' [patent_app_type] => 1 [patent_app_number] => 9/550885 [patent_app_country] => US [patent_app_date] => 2000-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5767 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249180.pdf [firstpage_image] =>[orig_patent_app_number] => 550885 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/550885
Phase noise and additive noise estimation in a QAM demodulator Apr 16, 2000 Issued
Array ( [id] => 4326986 [patent_doc_number] => 06249179 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Direct digital synthesis in a QAM demodulator' [patent_app_type] => 1 [patent_app_number] => 9/550556 [patent_app_country] => US [patent_app_date] => 2000-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5467 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249179.pdf [firstpage_image] =>[orig_patent_app_number] => 550556 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/550556
Direct digital synthesis in a QAM demodulator Apr 16, 2000 Issued
Array ( [id] => 4392418 [patent_doc_number] => 06262634 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-17 [patent_title] => 'Phase-locked loop with built-in self-test of phase margin and loop gain' [patent_app_type] => 1 [patent_app_number] => 9/548498 [patent_app_country] => US [patent_app_date] => 2000-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 4064 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/262/06262634.pdf [firstpage_image] =>[orig_patent_app_number] => 548498 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/548498
Phase-locked loop with built-in self-test of phase margin and loop gain Apr 12, 2000 Issued
Array ( [id] => 7639557 [patent_doc_number] => 06396359 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Tunable, distributed, voltage-controlled oscillator' [patent_app_type] => B1 [patent_app_number] => 09/548688 [patent_app_country] => US [patent_app_date] => 2000-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5471 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396359.pdf [firstpage_image] =>[orig_patent_app_number] => 09548688 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/548688
Tunable, distributed, voltage-controlled oscillator Apr 12, 2000 Issued
Array ( [id] => 7639561 [patent_doc_number] => 06396355 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Signal generator having fine resolution and low phase noise' [patent_app_type] => B1 [patent_app_number] => 09/547508 [patent_app_country] => US [patent_app_date] => 2000-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4269 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 5 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/396/06396355.pdf [firstpage_image] =>[orig_patent_app_number] => 09547508 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/547508
Signal generator having fine resolution and low phase noise Apr 11, 2000 Issued
Array ( [id] => 4312944 [patent_doc_number] => 06252466 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-26 [patent_title] => 'Power-up detector for a phase-locked loop circuit' [patent_app_type] => 1 [patent_app_number] => 9/547818 [patent_app_country] => US [patent_app_date] => 2000-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4941 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/252/06252466.pdf [firstpage_image] =>[orig_patent_app_number] => 547818 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/547818
Power-up detector for a phase-locked loop circuit Apr 10, 2000 Issued
Array ( [id] => 4300392 [patent_doc_number] => 06236284 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-22 [patent_title] => 'RF power amplifier system having distributed modulation encoding' [patent_app_type] => 1 [patent_app_number] => 9/545305 [patent_app_country] => US [patent_app_date] => 2000-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5924 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/236/06236284.pdf [firstpage_image] =>[orig_patent_app_number] => 545305 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/545305
RF power amplifier system having distributed modulation encoding Apr 6, 2000 Issued
Array ( [id] => 6639064 [patent_doc_number] => 20030006851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-09 [patent_title] => 'ELECTRONIC CIRCUITRY' [patent_app_type] => new [patent_app_number] => 09/529076 [patent_app_country] => US [patent_app_date] => 2000-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 30 [patent_no_of_words] => 13515 [patent_no_of_claims] => 57 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20030006851.pdf [firstpage_image] =>[orig_patent_app_number] => 09529076 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/529076
Electronic circuitry Apr 5, 2000 Issued
Array ( [id] => 4415656 [patent_doc_number] => 06300845 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Low-voltage, current-folded signal modulators and methods' [patent_app_type] => 1 [patent_app_number] => 9/544837 [patent_app_country] => US [patent_app_date] => 2000-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6575 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300845.pdf [firstpage_image] =>[orig_patent_app_number] => 544837 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/544837
Low-voltage, current-folded signal modulators and methods Apr 5, 2000 Issued
Array ( [id] => 4361892 [patent_doc_number] => 06292064 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-18 [patent_title] => 'Voltage controlled oscillator and semiconductor IC device including a voltage controlled capacitor' [patent_app_type] => 1 [patent_app_number] => 9/538226 [patent_app_country] => US [patent_app_date] => 2000-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 5011 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/292/06292064.pdf [firstpage_image] =>[orig_patent_app_number] => 538226 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/538226
Voltage controlled oscillator and semiconductor IC device including a voltage controlled capacitor Mar 29, 2000 Issued
Array ( [id] => 4415615 [patent_doc_number] => 06300841 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Atomic oscillator utilizing a high frequency converting circuit and an active, low-integral-number multiplier' [patent_app_type] => 1 [patent_app_number] => 9/536525 [patent_app_country] => US [patent_app_date] => 2000-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9415 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300841.pdf [firstpage_image] =>[orig_patent_app_number] => 536525 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/536525
Atomic oscillator utilizing a high frequency converting circuit and an active, low-integral-number multiplier Mar 27, 2000 Issued
Array ( [id] => 4388195 [patent_doc_number] => 06304147 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-16 [patent_title] => 'Method and circuit for reduced power consumption in a charge pump circuit' [patent_app_type] => 1 [patent_app_number] => 9/535948 [patent_app_country] => US [patent_app_date] => 2000-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3256 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/304/06304147.pdf [firstpage_image] =>[orig_patent_app_number] => 535948 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/535948
Method and circuit for reduced power consumption in a charge pump circuit Mar 26, 2000 Issued
Array ( [id] => 4327110 [patent_doc_number] => 06249188 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-06-19 [patent_title] => 'Error-suppressing phase comparator' [patent_app_type] => 1 [patent_app_number] => 9/528998 [patent_app_country] => US [patent_app_date] => 2000-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3328 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/249/06249188.pdf [firstpage_image] =>[orig_patent_app_number] => 528998 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/528998
Error-suppressing phase comparator Mar 19, 2000 Issued
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