Christopher Veraa

Array ( [id] => 6983404 [patent_doc_number] => 20050153474 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-14 [patent_title] => 'Vertical optical path structure for infrared photodetection' [patent_app_type] => utility [patent_app_number] => 10/755567 [patent_app_country] => US [patent_app_date] => 2004-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4097 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20050153474.pdf [firstpage_image] =>[orig_patent_app_number] => 10755567 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7304861 [patent_doc_number] => 20040140496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Bitline structure for DRAM and method of forming the same' [patent_app_type] => new [patent_app_number] => 10/752961 [patent_app_country] => US [patent_app_date] => 2004-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2238 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20040140496.pdf [firstpage_image] =>[orig_patent_app_number] => 10752961 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7260129 [patent_doc_number] => 20040150038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-05 [patent_title] => 'Trench MOSFET having low gate charge' [patent_app_type] => new [patent_app_number] => 10/751687 [patent_app_country] => US [patent_app_date] => 2004-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 6274 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0150/20040150038.pdf [firstpage_image] =>[orig_patent_app_number] => 10751687 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7304871 [patent_doc_number] => 20040140506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-22 [patent_title] => 'Enhanced T-gate structure for modulation doped field effect transistors' [patent_app_type] => new [patent_app_number] => 10/750697 [patent_app_country] => US [patent_app_date] => 2004-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4139 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20040140506.pdf [firstpage_image] =>[orig_patent_app_number] => 10750697 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 673008 [patent_doc_number] => 07091570 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-08-15 [patent_title] => 'MOS device and a process for manufacturing MOS devices using a dual-polysilicon layer technology with side contact' [patent_app_type] => utility [patent_app_number] => 10/745297 [patent_app_country] => US [patent_app_date] => 2003-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2812 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/091/07091570.pdf [firstpage_image] =>[orig_patent_app_number] => 10745297 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6970672 [patent_doc_number] => 20050036382 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-17 [patent_title] => 'Semiconductor memory element, semiconductor memory device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/735717 [patent_app_country] => US [patent_app_date] => 2003-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13645 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20050036382.pdf [firstpage_image] =>[orig_patent_app_number] => 10735717 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5820578 [patent_doc_number] => 20060024891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-02 [patent_title] => 'Method of manufacture of a trench-gate semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/538217 [patent_app_country] => US [patent_app_date] => 2003-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2420 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0024/20060024891.pdf [firstpage_image] =>[orig_patent_app_number] => 10538217 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7626598 [patent_doc_number] => 06768164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-07-27 [patent_title] => 'Stacked gate flash memory device and method of fabricating the same' [patent_app_type] => B2 [patent_app_number] => 10/725052 [patent_app_country] => US [patent_app_date] => 2003-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 3319 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/768/06768164.pdf [firstpage_image] =>[orig_patent_app_number] => 10725052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7198671 [patent_doc_number] => 20050051861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-03-10 [patent_title] => 'Avalanche photo-detector with high saturation power and high gain-bandwidth product' [patent_app_type] => utility [patent_app_number] => 10/720117 [patent_app_country] => US [patent_app_date] => 2003-11-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0051/20050051861.pdf [firstpage_image] =>[orig_patent_app_number] => 10720117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6936497 [patent_doc_number] => 20050110058 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-26 [patent_title] => 'Method and structure for reducing resistance of a semiconductor device feature' [patent_app_type] => utility [patent_app_number] => 10/719047 [patent_app_country] => US [patent_app_date] => 2003-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3264 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20050110058.pdf [firstpage_image] =>[orig_patent_app_number] => 10719047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7101347 [patent_doc_number] => 20050104073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Solid-state display with improved color-mixing' [patent_app_type] => utility [patent_app_number] => 10/715927 [patent_app_country] => US [patent_app_date] => 2003-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 1993 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0104/20050104073.pdf [firstpage_image] =>[orig_patent_app_number] => 10715927 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 751895 [patent_doc_number] => 07023068 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-04 [patent_title] => 'Method of etching a lateral trench under a drain junction of a MOS transistor' [patent_app_type] => utility [patent_app_number] => 10/716277 [patent_app_country] => US [patent_app_date] => 2003-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 16 [patent_no_of_words] => 1913 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/023/07023068.pdf [firstpage_image] =>[orig_patent_app_number] => 10716277 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7399923 [patent_doc_number] => 20040105023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Solid state imaging device with an output section having reduced power consumption, and manufacturing method thereof' [patent_app_type] => new [patent_app_number] => 10/713487 [patent_app_country] => US [patent_app_date] => 2003-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4785 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20040105023.pdf [firstpage_image] =>[orig_patent_app_number] => 10713487 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 1044095 [patent_doc_number] => 06867460 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-03-15 [patent_title] => 'FinFET SRAM cell with chevron FinFET logic' [patent_app_type] => utility [patent_app_number] => 10/605907 [patent_app_country] => US [patent_app_date] => 2003-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6112 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/867/06867460.pdf [firstpage_image] =>[orig_patent_app_number] => 10605907 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7451050 [patent_doc_number] => 20040099857 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Semiconductor optical device having current-confined structure' [patent_app_type] => new [patent_app_number] => 10/699127 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3804 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099857.pdf [firstpage_image] =>[orig_patent_app_number] => 10699127 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 979356 [patent_doc_number] => 06930362 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-16 [patent_title] => 'Calcium doped polysilicon gate electrodes' [patent_app_type] => utility [patent_app_number] => 10/698167 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 3018 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930362.pdf [firstpage_image] =>[orig_patent_app_number] => 10698167 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6915441 [patent_doc_number] => 20050093002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Light emitting diode device and manufacturing method' [patent_app_type] => utility [patent_app_number] => 10/695807 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2035 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20050093002.pdf [firstpage_image] =>[orig_patent_app_number] => 10695807 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6915598 [patent_doc_number] => 20050093159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-05 [patent_title] => 'Stress-relief layer for semiconductor applications' [patent_app_type] => utility [patent_app_number] => 10/698057 [patent_app_country] => US [patent_app_date] => 2003-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1502 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0093/20050093159.pdf [firstpage_image] =>[orig_patent_app_number] => 10698057 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 979348 [patent_doc_number] => 06930353 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-16 [patent_title] => 'Field-effect-type semiconductor device' [patent_app_type] => utility [patent_app_number] => 10/694947 [patent_app_country] => US [patent_app_date] => 2003-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 10405 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/930/06930353.pdf [firstpage_image] =>[orig_patent_app_number] => 10694947 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 996871 [patent_doc_number] => 06914313 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-07-05 [patent_title] => 'Process for integration of a high dielectric constant gate insulator layer in a CMOS device' [patent_app_type] => utility [patent_app_number] => 10/696007 [patent_app_country] => US [patent_app_date] => 2003-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 3977 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/914/06914313.pdf [firstpage_image] =>[orig_patent_app_number] => 10696007 [rel_patent_id] =>[rel_patent_doc_number] =>)