
Christopher Veraa
Examiner (ID: 16821, Phone: (571)272-2329 , Office: P/3638 )
| Most Active Art Unit | 3636 |
| Art Unit(s) | 3638, 3611, 3636 |
| Total Applications | 954 |
| Issued Applications | 418 |
| Pending Applications | 29 |
| Abandoned Applications | 518 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 7353442
[patent_doc_number] => 20040089865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-05-13
[patent_title] => 'Optoelectronic package'
[patent_app_type] => new
[patent_app_number] => 10/624057
[patent_app_country] => US
[patent_app_date] => 2003-07-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4024
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 23
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20040089865.pdf
[firstpage_image] =>[orig_patent_app_number] => 10624057
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/624057 | Optoelectronic package | Jul 20, 2003 | Issued |
Array
(
[id] => 7120339
[patent_doc_number] => 20050012168
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-20
[patent_title] => '4T CMOS image sensor with floating diffusion gate capacitor'
[patent_app_type] => utility
[patent_app_number] => 10/618627
[patent_app_country] => US
[patent_app_date] => 2003-07-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4177
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0012/20050012168.pdf
[firstpage_image] =>[orig_patent_app_number] => 10618627
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/618627 | Image sensor with floating diffusion gate capacitor | Jul 14, 2003 | Issued |
Array
(
[id] => 7604990
[patent_doc_number] => 07115940
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2006-10-03
[patent_title] => 'Semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/617667
[patent_app_country] => US
[patent_app_date] => 2003-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 42
[patent_no_of_words] => 9640
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/115/07115940.pdf
[firstpage_image] =>[orig_patent_app_number] => 10617667
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/617667 | Semiconductor device | Jul 13, 2003 | Issued |
Array
(
[id] => 7278744
[patent_doc_number] => 20040061121
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-04-01
[patent_title] => 'Light-emitting device, method of manufacturing the same, and electronic apparatus'
[patent_app_type] => new
[patent_app_number] => 10/615847
[patent_app_country] => US
[patent_app_date] => 2003-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 12270
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 46
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0061/20040061121.pdf
[firstpage_image] =>[orig_patent_app_number] => 10615847
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/615847 | Light-emitting device, method of manufacturing the same, and electronic apparatus | Jul 9, 2003 | Issued |
Array
(
[id] => 7627945
[patent_doc_number] => 06806492
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-10-19
[patent_title] => 'Heterojunction organic semiconductor field effect transistor (FET) with a gate insulation layer and manufacturing process thereof'
[patent_app_type] => B2
[patent_app_number] => 10/614987
[patent_app_country] => US
[patent_app_date] => 2003-07-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3095
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 9
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/806/06806492.pdf
[firstpage_image] =>[orig_patent_app_number] => 10614987
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/614987 | Heterojunction organic semiconductor field effect transistor (FET) with a gate insulation layer and manufacturing process thereof | Jul 8, 2003 | Issued |
Array
(
[id] => 7061201
[patent_doc_number] => 20050003562
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-06
[patent_title] => 'Integrated circuit with inductor having horizontal magnetic flux lines'
[patent_app_type] => utility
[patent_app_number] => 10/614307
[patent_app_country] => US
[patent_app_date] => 2003-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3830
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0003/20050003562.pdf
[firstpage_image] =>[orig_patent_app_number] => 10614307
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/614307 | Integrated circuit with inductor having horizontal magnetic flux lines | Jul 1, 2003 | Issued |
Array
(
[id] => 1069265
[patent_doc_number] => 06844629
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-01-18
[patent_title] => 'Display panel with bypassing lines'
[patent_app_type] => utility
[patent_app_number] => 10/609597
[patent_app_country] => US
[patent_app_date] => 2003-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 2729
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/844/06844629.pdf
[firstpage_image] =>[orig_patent_app_number] => 10609597
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/609597 | Display panel with bypassing lines | Jun 30, 2003 | Issued |
Array
(
[id] => 7295895
[patent_doc_number] => 20040124463
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-01
[patent_title] => 'Semiconductor integrated circuit device'
[patent_app_type] => new
[patent_app_number] => 10/609957
[patent_app_country] => US
[patent_app_date] => 2003-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2989
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0124/20040124463.pdf
[firstpage_image] =>[orig_patent_app_number] => 10609957
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/609957 | Semiconductor integrated circuit device | Jun 29, 2003 | Issued |
Array
(
[id] => 7629422
[patent_doc_number] => 06818934
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-11-16
[patent_title] => 'Image sensor having micro-lens array separated with trench structures and method of making'
[patent_app_type] => B1
[patent_app_number] => 10/603727
[patent_app_country] => US
[patent_app_date] => 2003-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2502
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 5
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/818/06818934.pdf
[firstpage_image] =>[orig_patent_app_number] => 10603727
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/603727 | Image sensor having micro-lens array separated with trench structures and method of making | Jun 23, 2003 | Issued |
Array
(
[id] => 1031458
[patent_doc_number] => 06879012
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-12
[patent_title] => 'Giant planar hall effect in epitaxial ferromagnetic semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 10/602537
[patent_app_country] => US
[patent_app_date] => 2003-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 16
[patent_no_of_words] => 9870
[patent_no_of_claims] => 52
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/879/06879012.pdf
[firstpage_image] =>[orig_patent_app_number] => 10602537
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/602537 | Giant planar hall effect in epitaxial ferromagnetic semiconductor devices | Jun 22, 2003 | Issued |
Array
(
[id] => 1102579
[patent_doc_number] => 06815722
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-09
[patent_title] => 'Light-emitting device with reduced lattice mismatch'
[patent_app_type] => B2
[patent_app_number] => 10/601957
[patent_app_country] => US
[patent_app_date] => 2003-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 3
[patent_no_of_words] => 2644
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/815/06815722.pdf
[firstpage_image] =>[orig_patent_app_number] => 10601957
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/601957 | Light-emitting device with reduced lattice mismatch | Jun 22, 2003 | Issued |
Array
(
[id] => 1106070
[patent_doc_number] => 06812487
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-11-02
[patent_title] => 'Test key and method for validating the doping concentration of buried layers within a deep trench capacitors'
[patent_app_type] => B1
[patent_app_number] => 10/601417
[patent_app_country] => US
[patent_app_date] => 2003-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 1979
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/812/06812487.pdf
[firstpage_image] =>[orig_patent_app_number] => 10601417
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/601417 | Test key and method for validating the doping concentration of buried layers within a deep trench capacitors | Jun 22, 2003 | Issued |
Array
(
[id] => 7234796
[patent_doc_number] => 20040256662
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-12-23
[patent_title] => 'Nonvolatile memory device using semiconductor nanocrystals and method of forming same'
[patent_app_type] => new
[patent_app_number] => 10/465797
[patent_app_country] => US
[patent_app_date] => 2003-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 7519
[patent_no_of_claims] => 35
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 40
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20040256662.pdf
[firstpage_image] =>[orig_patent_app_number] => 10465797
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/465797 | Nonvolatile memory device using semiconductor nanocrystals and method of forming same | Jun 19, 2003 | Issued |
Array
(
[id] => 1106187
[patent_doc_number] => 06812525
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-11-02
[patent_title] => 'Trench fill process'
[patent_app_type] => B2
[patent_app_number] => 10/465496
[patent_app_country] => US
[patent_app_date] => 2003-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 979
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 192
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/812/06812525.pdf
[firstpage_image] =>[orig_patent_app_number] => 10465496
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/465496 | Trench fill process | Jun 17, 2003 | Issued |
Array
(
[id] => 6768031
[patent_doc_number] => 20030213971
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-20
[patent_title] => 'Silicon controlled rectifier ESD structures with trench isolation'
[patent_app_type] => new
[patent_app_number] => 10/462287
[patent_app_country] => US
[patent_app_date] => 2003-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3968
[patent_no_of_claims] => 44
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0213/20030213971.pdf
[firstpage_image] =>[orig_patent_app_number] => 10462287
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/462287 | Silicon controlled rectifier ESD structures with trench isolation | Jun 15, 2003 | Issued |
Array
(
[id] => 7135241
[patent_doc_number] => 20040043628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-04
[patent_title] => 'Method of forming an oxide film'
[patent_app_type] => new
[patent_app_number] => 10/459430
[patent_app_country] => US
[patent_app_date] => 2003-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6515
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 27
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0043/20040043628.pdf
[firstpage_image] =>[orig_patent_app_number] => 10459430
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/459430 | Method of forming an oxide film | Jun 11, 2003 | Issued |
Array
(
[id] => 1081364
[patent_doc_number] => 06835999
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-12-28
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => B2
[patent_app_number] => 10/458267
[patent_app_country] => US
[patent_app_date] => 2003-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 4708
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 187
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/835/06835999.pdf
[firstpage_image] =>[orig_patent_app_number] => 10458267
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/458267 | Semiconductor device and method of manufacturing the same | Jun 10, 2003 | Issued |
Array
(
[id] => 7427686
[patent_doc_number] => 20040007770
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-01-15
[patent_title] => 'Semiconductor-mounting substrate used to manufacture electronic packages, and production process for producing such semiconductor-mounting substrate'
[patent_app_type] => new
[patent_app_number] => 10/457887
[patent_app_country] => US
[patent_app_date] => 2003-06-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 10304
[patent_no_of_claims] => 40
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20040007770.pdf
[firstpage_image] =>[orig_patent_app_number] => 10457887
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/457887 | Semiconductor-mounting substrate used to manufacture electronic packages, and production process for producing such semiconductor-mounting substrate | Jun 9, 2003 | Abandoned |
Array
(
[id] => 6610532
[patent_doc_number] => 20030209711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-11-13
[patent_title] => 'Thin film transistor and fabricating method thereof'
[patent_app_type] => new
[patent_app_number] => 10/456587
[patent_app_country] => US
[patent_app_date] => 2003-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 2876
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0209/20030209711.pdf
[firstpage_image] =>[orig_patent_app_number] => 10456587
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/456587 | Thin film transistor and fabricating method thereof | Jun 8, 2003 | Issued |
Array
(
[id] => 6803375
[patent_doc_number] => 20030230769
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-18
[patent_title] => 'Standard cell for plural power supplies and related technologies'
[patent_app_type] => new
[patent_app_number] => 10/455387
[patent_app_country] => US
[patent_app_date] => 2003-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 10466
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0230/20030230769.pdf
[firstpage_image] =>[orig_patent_app_number] => 10455387
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/455387 | Standard cell for plural power supplies and related technologies | Jun 5, 2003 | Issued |