| Application number | Title of the application | Filing Date | Status |
|---|
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Array
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[patent_kind] => NA
[patent_issue_date] => 1999-06-01
[patent_title] => 'Fabrication method of semiconductor device with CMOS structure'
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Array
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[patent_doc_number] => 06071786
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[patent_issue_date] => 2000-06-06
[patent_title] => 'Method of manufacturing a bipolar transistor and its emitter contact'
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[patent_app_number] => 9/060512
[patent_app_country] => US
[patent_app_date] => 1998-04-14
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[firstpage_image] =>[orig_patent_app_number] => 060512
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/060512 | Method of manufacturing a bipolar transistor and its emitter contact | Apr 13, 1998 | Issued |
| 09/057452 | METHOD OF FORMING PROJECTION ELECTRODES | Apr 8, 1998 | Abandoned |
Array
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[patent_doc_number] => 06077723
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[patent_kind] => NA
[patent_issue_date] => 2000-06-20
[patent_title] => 'Method for fabricating a multi chip module with alignment member'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 053253
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/053253 | Method for fabricating a multi chip module with alignment member | Mar 31, 1998 | Issued |
| 09/048560 | METHOD FOR ELECTRICALLY CONNECTING A SEMICONDUCTOR CHIP TO AT LEAST ONE CONTACT SURFACE AND SMART CARD MODULE AND SMART CARD PRODUCED BY THE METHOD | Mar 25, 1998 | Issued |
Array
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[patent_title] => 'Blanket well counter doping process for high speed/low power MOSFETs'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/046332 | Blanket well counter doping process for high speed/low power MOSFETs | Mar 22, 1998 | Issued |
| 09/046331 | 3-D CMOS TRANSISTORS WITH HIGH ESD RELIABILITY | Mar 22, 1998 | Issued |
Array
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Array
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[patent_issue_date] => 1999-11-30
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[firstpage_image] =>[orig_patent_app_number] => 042013
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Array
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[patent_issue_date] => 2000-01-04
[patent_title] => 'Method of making dual-gate CMOSFET'
[patent_app_type] => 1
[patent_app_number] => 9/033521
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[firstpage_image] =>[orig_patent_app_number] => 033521
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/033521 | Method of making dual-gate CMOSFET | Mar 1, 1998 | Issued |
| 09/031683 | PROCESS FOR FABRICATING A HIGH PERFORMANCE LOGIC AND EMBEDDED DRAM DEVICES ON A SINGLE SEMICONDUCTOR CHIP | Feb 26, 1998 | Issued |
Array
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/027572 | Method for fabricating an electrostatic discharge device | Feb 22, 1998 | Issued |
Array
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