Search

Christopher W. Lattin

Examiner (ID: 12877)

Most Active Art Unit
2812
Art Unit(s)
2812
Total Applications
316
Issued Applications
265
Pending Applications
16
Abandoned Applications
35

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6075947 [patent_doc_number] => 20020079510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Method of manufacturing bipolar device and structure thereof' [patent_app_type] => new [patent_app_number] => 09/747761 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 4436 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20020079510.pdf [firstpage_image] =>[orig_patent_app_number] => 09747761 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/747761
Method of manufacturing a bipolar device Dec 20, 2000 Issued
Array ( [id] => 7093094 [patent_doc_number] => 20010034073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-25 [patent_title] => 'Method of manufacturing array substrate for use in liquid crystal display device' [patent_app_type] => new [patent_app_number] => 09/734562 [patent_app_country] => US [patent_app_date] => 2000-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3476 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20010034073.pdf [firstpage_image] =>[orig_patent_app_number] => 09734562 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/734562
Method of manufacturing array substrate for use in liquid crystal display device Dec 12, 2000 Abandoned
Array ( [id] => 1600220 [patent_doc_number] => 06475834 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-11-05 [patent_title] => 'Method of manufacturing a semiconductor component and semiconductor component thereof' [patent_app_type] => B2 [patent_app_number] => 09/728392 [patent_app_country] => US [patent_app_date] => 2000-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 2851 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/475/06475834.pdf [firstpage_image] =>[orig_patent_app_number] => 09728392 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/728392
Method of manufacturing a semiconductor component and semiconductor component thereof Dec 3, 2000 Issued
Array ( [id] => 6880230 [patent_doc_number] => 20010031517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-18 [patent_title] => 'Process for fabrication of split-gate virtual phase charge coupled devices' [patent_app_type] => new [patent_app_number] => 09/728261 [patent_app_country] => US [patent_app_date] => 2000-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1599 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0031/20010031517.pdf [firstpage_image] =>[orig_patent_app_number] => 09728261 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/728261
Process for fabrication of split-gate virtual phase charge coupled devices Nov 30, 2000 Abandoned
Array ( [id] => 1588705 [patent_doc_number] => 06482679 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Electronic component with shield case and method for manufacturing the same' [patent_app_type] => B1 [patent_app_number] => 09/723211 [patent_app_country] => US [patent_app_date] => 2000-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 32 [patent_no_of_words] => 6306 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/482/06482679.pdf [firstpage_image] =>[orig_patent_app_number] => 09723211 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/723211
Electronic component with shield case and method for manufacturing the same Nov 26, 2000 Issued
Array ( [id] => 1297427 [patent_doc_number] => 06627517 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-30 [patent_title] => 'Semiconductor package with improved thermal cycling performance, and method of forming same' [patent_app_type] => B1 [patent_app_number] => 09/715362 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1292 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/627/06627517.pdf [firstpage_image] =>[orig_patent_app_number] => 09715362 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/715362
Semiconductor package with improved thermal cycling performance, and method of forming same Nov 16, 2000 Issued
Array ( [id] => 1303106 [patent_doc_number] => 06620732 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Method for controlling critical dimension in a polycrystalline silicon emitter and related structure' [patent_app_type] => B1 [patent_app_number] => 09/721551 [patent_app_country] => US [patent_app_date] => 2000-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5917 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620732.pdf [firstpage_image] =>[orig_patent_app_number] => 09721551 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/721551
Method for controlling critical dimension in a polycrystalline silicon emitter and related structure Nov 16, 2000 Issued
Array ( [id] => 1418695 [patent_doc_number] => 06506616 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-14 [patent_title] => 'Photolithographic method for fabricating organic light-emitting diodes' [patent_app_type] => B1 [patent_app_number] => 09/714472 [patent_app_country] => US [patent_app_date] => 2000-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 4540 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/506/06506616.pdf [firstpage_image] =>[orig_patent_app_number] => 09714472 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/714472
Photolithographic method for fabricating organic light-emitting diodes Nov 15, 2000 Issued
Array ( [id] => 7640271 [patent_doc_number] => 06395643 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Gas manifold for uniform gas distribution and photochemistry' [patent_app_type] => B1 [patent_app_number] => 09/712312 [patent_app_country] => US [patent_app_date] => 2000-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3318 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/395/06395643.pdf [firstpage_image] =>[orig_patent_app_number] => 09712312 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/712312
Gas manifold for uniform gas distribution and photochemistry Nov 12, 2000 Issued
Array ( [id] => 1469807 [patent_doc_number] => 06406966 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-18 [patent_title] => 'Uniform emitter formation using selective laser recrystallization' [patent_app_type] => B1 [patent_app_number] => 09/708261 [patent_app_country] => US [patent_app_date] => 2000-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 1480 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 291 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/406/06406966.pdf [firstpage_image] =>[orig_patent_app_number] => 09708261 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/708261
Uniform emitter formation using selective laser recrystallization Nov 6, 2000 Issued
09/703433 Method of producing field emission display Oct 30, 2000 Abandoned
Array ( [id] => 1315466 [patent_doc_number] => 06607961 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-19 [patent_title] => 'Method of definition of two self-aligned areas at the upper surface of a substrate' [patent_app_type] => B1 [patent_app_number] => 09/696121 [patent_app_country] => US [patent_app_date] => 2000-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 13 [patent_no_of_words] => 2699 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/607/06607961.pdf [firstpage_image] =>[orig_patent_app_number] => 09696121 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/696121
Method of definition of two self-aligned areas at the upper surface of a substrate Oct 24, 2000 Issued
Array ( [id] => 1588661 [patent_doc_number] => 06482670 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-19 [patent_title] => 'Semiconductor manufacturing unit and semiconductor manufacturing method' [patent_app_type] => B1 [patent_app_number] => 09/661304 [patent_app_country] => US [patent_app_date] => 2000-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3821 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/482/06482670.pdf [firstpage_image] =>[orig_patent_app_number] => 09661304 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/661304
Semiconductor manufacturing unit and semiconductor manufacturing method Sep 12, 2000 Issued
Array ( [id] => 1415314 [patent_doc_number] => 06518091 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Method of making anisotropic conductive elements for use in microelectronic packaging' [patent_app_type] => B1 [patent_app_number] => 09/655300 [patent_app_country] => US [patent_app_date] => 2000-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 28 [patent_no_of_words] => 7062 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/518/06518091.pdf [firstpage_image] =>[orig_patent_app_number] => 09655300 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/655300
Method of making anisotropic conductive elements for use in microelectronic packaging Sep 4, 2000 Issued
Array ( [id] => 1474544 [patent_doc_number] => 06387768 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method of manufacturing a semiconductor component and semiconductor component thereof' [patent_app_type] => B1 [patent_app_number] => 09/649782 [patent_app_country] => US [patent_app_date] => 2000-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 3419 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387768.pdf [firstpage_image] =>[orig_patent_app_number] => 09649782 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/649782
Method of manufacturing a semiconductor component and semiconductor component thereof Aug 28, 2000 Issued
09/649382 Method of fabricating deep sub-micron cmos source/drain with mdd and selective cvd silicide Aug 27, 2000 Abandoned
Array ( [id] => 1446586 [patent_doc_number] => 06368929 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-09 [patent_title] => 'Method of manufacturing a semiconductor component and semiconductor component thereof' [patent_app_type] => B1 [patent_app_number] => 09/641002 [patent_app_country] => US [patent_app_date] => 2000-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2343 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/368/06368929.pdf [firstpage_image] =>[orig_patent_app_number] => 09641002 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/641002
Method of manufacturing a semiconductor component and semiconductor component thereof Aug 16, 2000 Issued
Array ( [id] => 4368887 [patent_doc_number] => 06287929 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Method of forming a bipolar transistor for suppressing variation in base width' [patent_app_type] => 1 [patent_app_number] => 9/639726 [patent_app_country] => US [patent_app_date] => 2000-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3996 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/287/06287929.pdf [firstpage_image] =>[orig_patent_app_number] => 639726 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/639726
Method of forming a bipolar transistor for suppressing variation in base width Aug 15, 2000 Issued
Array ( [id] => 1520625 [patent_doc_number] => 06413799 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method of forming a ball-grid array package at a wafer level' [patent_app_type] => B1 [patent_app_number] => 09/625072 [patent_app_country] => US [patent_app_date] => 2000-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2653 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413799.pdf [firstpage_image] =>[orig_patent_app_number] => 09625072 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/625072
Method of forming a ball-grid array package at a wafer level Jul 24, 2000 Issued
Array ( [id] => 1453434 [patent_doc_number] => 06461895 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Process for making active interposer for high performance packaging applications' [patent_app_type] => B1 [patent_app_number] => 09/606871 [patent_app_country] => US [patent_app_date] => 2000-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 27 [patent_no_of_words] => 3660 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/461/06461895.pdf [firstpage_image] =>[orig_patent_app_number] => 09606871 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/606871
Process for making active interposer for high performance packaging applications Jun 28, 2000 Issued
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