Search

Christopher W. Raimund

Examiner (ID: 15757)

Most Active Art Unit
1746
Art Unit(s)
1504, 1771, 1314, 2899, 1773, 1746, 1754
Total Applications
1117
Issued Applications
823
Pending Applications
122
Abandoned Applications
186

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4233218 [patent_doc_number] => 06112017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-08-29 [patent_title] => 'Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus' [patent_app_type] => 1 [patent_app_number] => 8/967515 [patent_app_country] => US [patent_app_date] => 1997-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 178 [patent_no_of_words] => 177302 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/112/06112017.pdf [firstpage_image] =>[orig_patent_app_number] => 967515 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/967515
Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus Nov 10, 1997 Issued
Array ( [id] => 3968862 [patent_doc_number] => 05978592 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Video decompression and decoding system utilizing control and data tokens' [patent_app_type] => 1 [patent_app_number] => 8/947676 [patent_app_country] => US [patent_app_date] => 1997-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 188 [patent_no_of_words] => 177220 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978592.pdf [firstpage_image] =>[orig_patent_app_number] => 947676 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/947676
Video decompression and decoding system utilizing control and data tokens Oct 7, 1997 Issued
Array ( [id] => 4113187 [patent_doc_number] => 06067417 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-05-23 [patent_title] => 'Picture start token' [patent_app_type] => 1 [patent_app_number] => 8/946754 [patent_app_country] => US [patent_app_date] => 1997-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 187 [patent_no_of_words] => 176486 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/067/06067417.pdf [firstpage_image] =>[orig_patent_app_number] => 946754 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/946754
Picture start token Oct 6, 1997 Issued
Array ( [id] => 3961872 [patent_doc_number] => 05974530 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-26 [patent_title] => 'Integrated PCI buffer controller and XOR function circuit' [patent_app_type] => 1 [patent_app_number] => 8/942373 [patent_app_country] => US [patent_app_date] => 1997-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 10803 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/974/05974530.pdf [firstpage_image] =>[orig_patent_app_number] => 942373 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/942373
Integrated PCI buffer controller and XOR function circuit Oct 1, 1997 Issued
Array ( [id] => 4031823 [patent_doc_number] => 05881301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Inverse modeller' [patent_app_type] => 1 [patent_app_number] => 8/947675 [patent_app_country] => US [patent_app_date] => 1997-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 178 [patent_no_of_words] => 178131 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/881/05881301.pdf [firstpage_image] =>[orig_patent_app_number] => 947675 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/947675
Inverse modeller Oct 1, 1997 Issued
Array ( [id] => 3794202 [patent_doc_number] => 05809270 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Inverse quantizer' [patent_app_type] => 1 [patent_app_number] => 8/947727 [patent_app_country] => US [patent_app_date] => 1997-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 186 [patent_no_of_words] => 176441 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809270.pdf [firstpage_image] =>[orig_patent_app_number] => 947727 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/947727
Inverse quantizer Sep 24, 1997 Issued
Array ( [id] => 4224105 [patent_doc_number] => 06079009 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Coding standard token in a system compromising a plurality of pipeline stages' [patent_app_type] => 1 [patent_app_number] => 8/937143 [patent_app_country] => US [patent_app_date] => 1997-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 187 [patent_no_of_words] => 177238 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/079/06079009.pdf [firstpage_image] =>[orig_patent_app_number] => 937143 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/937143
Coding standard token in a system compromising a plurality of pipeline stages Sep 23, 1997 Issued
Array ( [id] => 4036830 [patent_doc_number] => 05968160 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-10-19 [patent_title] => 'Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory' [patent_app_type] => 1 [patent_app_number] => 8/923632 [patent_app_country] => US [patent_app_date] => 1997-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 23857 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 326 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/968/05968160.pdf [firstpage_image] =>[orig_patent_app_number] => 923632 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/923632
Method and apparatus for processing data in multiple modes in accordance with parallelism of program by using cache memory Sep 3, 1997 Issued
Array ( [id] => 4008646 [patent_doc_number] => 05892961 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-04-06 [patent_title] => 'Field programmable gate array having programming instructions in the configuration bitstream' [patent_app_type] => 1 [patent_app_number] => 8/920738 [patent_app_country] => US [patent_app_date] => 1997-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5981 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/892/05892961.pdf [firstpage_image] =>[orig_patent_app_number] => 920738 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/920738
Field programmable gate array having programming instructions in the configuration bitstream Aug 28, 1997 Issued
Array ( [id] => 4195035 [patent_doc_number] => 06038380 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-14 [patent_title] => 'Data pipeline system and data encoding method' [patent_app_type] => 1 [patent_app_number] => 8/903969 [patent_app_country] => US [patent_app_date] => 1997-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 188 [patent_no_of_words] => 183531 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 310 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/038/06038380.pdf [firstpage_image] =>[orig_patent_app_number] => 903969 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/903969
Data pipeline system and data encoding method Jul 30, 1997 Issued
Array ( [id] => 3793944 [patent_doc_number] => 05809253 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Method and apparatus for interconnecting network devices in a networking hub' [patent_app_type] => 1 [patent_app_number] => 8/888999 [patent_app_country] => US [patent_app_date] => 1997-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12851 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809253.pdf [firstpage_image] =>[orig_patent_app_number] => 888999 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/888999
Method and apparatus for interconnecting network devices in a networking hub Jul 6, 1997 Issued
Array ( [id] => 3898402 [patent_doc_number] => 05805915 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'SIMIMD array processing system' [patent_app_type] => 1 [patent_app_number] => 8/883806 [patent_app_country] => US [patent_app_date] => 1997-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 18861 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805915.pdf [firstpage_image] =>[orig_patent_app_number] => 883806 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/883806
SIMIMD array processing system Jun 26, 1997 Issued
Array ( [id] => 4015323 [patent_doc_number] => 05925133 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'Integrated processor system adapted for portable personal information devices' [patent_app_type] => 1 [patent_app_number] => 8/866373 [patent_app_country] => US [patent_app_date] => 1997-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6198 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925133.pdf [firstpage_image] =>[orig_patent_app_number] => 866373 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/866373
Integrated processor system adapted for portable personal information devices May 29, 1997 Issued
Array ( [id] => 3966018 [patent_doc_number] => 05956519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Picture end token in a system comprising a plurality of pipeline stages' [patent_app_type] => 1 [patent_app_number] => 8/850125 [patent_app_country] => US [patent_app_date] => 1997-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 124 [patent_figures_cnt] => 178 [patent_no_of_words] => 176676 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 333 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/956/05956519.pdf [firstpage_image] =>[orig_patent_app_number] => 850125 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/850125
Picture end token in a system comprising a plurality of pipeline stages Apr 30, 1997 Issued
Array ( [id] => 3968432 [patent_doc_number] => 05978565 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Method for rapid recovery from a network file server failure including method for operating co-standby servers' [patent_app_type] => 1 [patent_app_number] => 8/848139 [patent_app_country] => US [patent_app_date] => 1997-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4738 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 383 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/978/05978565.pdf [firstpage_image] =>[orig_patent_app_number] => 848139 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/848139
Method for rapid recovery from a network file server failure including method for operating co-standby servers Apr 27, 1997 Issued
Array ( [id] => 3879023 [patent_doc_number] => 05794035 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-11 [patent_title] => 'Device driver and input/output hardware research manager' [patent_app_type] => 1 [patent_app_number] => 8/858196 [patent_app_country] => US [patent_app_date] => 1997-04-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5536 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/794/05794035.pdf [firstpage_image] =>[orig_patent_app_number] => 858196 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/858196
Device driver and input/output hardware research manager Apr 23, 1997 Issued
Array ( [id] => 3915470 [patent_doc_number] => 05944813 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-31 [patent_title] => 'FPGA input output buffer with registered tristate enable' [patent_app_type] => 1 [patent_app_number] => 8/840560 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 7907 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/944/05944813.pdf [firstpage_image] =>[orig_patent_app_number] => 840560 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/840560
FPGA input output buffer with registered tristate enable Apr 7, 1997 Issued
Array ( [id] => 3788230 [patent_doc_number] => 05774698 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Multi-media serial line switching adapter for parallel networks and heterogeneous and homologous computer system' [patent_app_type] => 1 [patent_app_number] => 8/810270 [patent_app_country] => US [patent_app_date] => 1997-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 70 [patent_figures_cnt] => 89 [patent_no_of_words] => 41981 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 380 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/774/05774698.pdf [firstpage_image] =>[orig_patent_app_number] => 810270 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/810270
Multi-media serial line switching adapter for parallel networks and heterogeneous and homologous computer system Mar 2, 1997 Issued
Array ( [id] => 4029996 [patent_doc_number] => 05907692 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-25 [patent_title] => 'Data pipeline system and data encoding method' [patent_app_type] => 1 [patent_app_number] => 8/804620 [patent_app_country] => US [patent_app_date] => 1997-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16487 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/907/05907692.pdf [firstpage_image] =>[orig_patent_app_number] => 804620 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/804620
Data pipeline system and data encoding method Feb 23, 1997 Issued
Array ( [id] => 3854428 [patent_doc_number] => 05708784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Dual bus computer architecture utilizing distributed arbitrators and method of using same' [patent_app_type] => 1 [patent_app_number] => 8/803290 [patent_app_country] => US [patent_app_date] => 1997-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2131 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708784.pdf [firstpage_image] =>[orig_patent_app_number] => 803290 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/803290
Dual bus computer architecture utilizing distributed arbitrators and method of using same Feb 19, 1997 Issued
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