Search

Christy L. Novacek

Examiner (ID: 13644)

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
465
Issued Applications
357
Pending Applications
12
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6021353 [patent_doc_number] => 20110049679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'METHOD OF PROCESSING OF NITRIDE SEMICONDUCTOR WAFER, NITRIDE SEMICONDUCTOR WAFER, METHOD OF PRODUCING NITRIDE SEMICONDUCTOR DEVICE AND NITRIDE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/940733 [patent_app_country] => US [patent_app_date] => 2010-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 24677 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20110049679.pdf [firstpage_image] =>[orig_patent_app_number] => 12940733 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/940733
Method of processing of nitride semiconductor wafer, nitride semiconductor wafer, method of producing nitride semiconductor device and nitride semiconductor device Nov 4, 2010 Issued
Array ( [id] => 6273777 [patent_doc_number] => 20100255632 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-10-07 [patent_title] => 'PHOTOELECTRIC CONVERSION DEVICE, ITS MANUFACTURING METHOD, ELECTRONIC APPARATUS, ITS MANUFACTURING METHOD, SEMICONDUCTOR LAYER, AND ITS MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/816525 [patent_app_country] => US [patent_app_date] => 2010-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7943 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0255/20100255632.pdf [firstpage_image] =>[orig_patent_app_number] => 12816525 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/816525
PHOTOELECTRIC CONVERSION DEVICE, ITS MANUFACTURING METHOD, ELECTRONIC APPARATUS, ITS MANUFACTURING METHOD, SEMICONDUCTOR LAYER, AND ITS MANUFACTURING METHOD Jun 15, 2010 Abandoned
Array ( [id] => 4460137 [patent_doc_number] => 07879636 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-01 [patent_title] => 'Method of forming p-type gallium nitride based semiconductor, method of forming nitride semiconductor device, and method of forming epitaxial wafer' [patent_app_type] => utility [patent_app_number] => 12/771018 [patent_app_country] => US [patent_app_date] => 2010-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6592 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 13 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/879/07879636.pdf [firstpage_image] =>[orig_patent_app_number] => 12771018 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/771018
Method of forming p-type gallium nitride based semiconductor, method of forming nitride semiconductor device, and method of forming epitaxial wafer Apr 29, 2010 Issued
Array ( [id] => 6386557 [patent_doc_number] => 20100176911 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-15 [patent_title] => 'Fuse of Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 12/729959 [patent_app_country] => US [patent_app_date] => 2010-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2510 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0176/20100176911.pdf [firstpage_image] =>[orig_patent_app_number] => 12729959 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/729959
Fuse of semiconductor device Mar 22, 2010 Issued
Array ( [id] => 4546814 [patent_doc_number] => RE041989 [patent_country] => US [patent_kind] => E1 [patent_issue_date] => 2010-12-07 [patent_title] => 'Method and apparatus for electronic device manufacture using shadow masks' [patent_app_type] => reissue [patent_app_number] => 12/697398 [patent_app_country] => US [patent_app_date] => 2010-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 6933 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/041/RE041989.pdf [firstpage_image] =>[orig_patent_app_number] => 12697398 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/697398
Method and apparatus for electronic device manufacture using shadow masks Jan 31, 2010 Issued
Array ( [id] => 4639439 [patent_doc_number] => 08017466 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-09-13 [patent_title] => 'Semiconductor device and manufacturing method for the same' [patent_app_type] => utility [patent_app_number] => 12/591162 [patent_app_country] => US [patent_app_date] => 2009-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 27 [patent_no_of_words] => 10129 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/017/08017466.pdf [firstpage_image] =>[orig_patent_app_number] => 12591162 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/591162
Semiconductor device and manufacturing method for the same Nov 9, 2009 Issued
Array ( [id] => 7713396 [patent_doc_number] => 08093666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-10 [patent_title] => 'Lanthanide yttrium aluminum oxide dielectric films' [patent_app_type] => utility [patent_app_number] => 12/615083 [patent_app_country] => US [patent_app_date] => 2009-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 9980 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 11 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/093/08093666.pdf [firstpage_image] =>[orig_patent_app_number] => 12615083 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/615083
Lanthanide yttrium aluminum oxide dielectric films Nov 8, 2009 Issued
Array ( [id] => 6369241 [patent_doc_number] => 20100314764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-16 [patent_title] => 'HYBRID METALLIC WIRE AND METHODS OF FABRICATING SAME' [patent_app_type] => utility [patent_app_number] => 12/482777 [patent_app_country] => US [patent_app_date] => 2009-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3653 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0314/20100314764.pdf [firstpage_image] =>[orig_patent_app_number] => 12482777 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/482777
Hybrid metallic wire and methods of fabricating same Jun 10, 2009 Issued
Array ( [id] => 6280550 [patent_doc_number] => 20100155915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-06-24 [patent_title] => 'STACKED POWER CONVERTER STRUCTURE AND METHOD' [patent_app_type] => utility [patent_app_number] => 12/477818 [patent_app_country] => US [patent_app_date] => 2009-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5642 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0155/20100155915.pdf [firstpage_image] =>[orig_patent_app_number] => 12477818 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/477818
Stacked power converter structure and method Jun 2, 2009 Issued
Array ( [id] => 6444769 [patent_doc_number] => 20100283053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-11-11 [patent_title] => 'NONVOLATILE MEMORY ARRAY COMPRISING SILICON-BASED DIODES FABRICATED AT LOW TEMPERATURE' [patent_app_type] => utility [patent_app_number] => 12/463530 [patent_app_country] => US [patent_app_date] => 2009-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7047 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0283/20100283053.pdf [firstpage_image] =>[orig_patent_app_number] => 12463530 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/463530
NONVOLATILE MEMORY ARRAY COMPRISING SILICON-BASED DIODES FABRICATED AT LOW TEMPERATURE May 10, 2009 Abandoned
Array ( [id] => 4614305 [patent_doc_number] => 07989912 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-02 [patent_title] => 'Semiconductor device having a compressed device isolation structure' [patent_app_type] => utility [patent_app_number] => 12/437402 [patent_app_country] => US [patent_app_date] => 2009-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 4405 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/989/07989912.pdf [firstpage_image] =>[orig_patent_app_number] => 12437402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/437402
Semiconductor device having a compressed device isolation structure May 6, 2009 Issued
Array ( [id] => 5514897 [patent_doc_number] => 20090215204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'FABRICATION METHOD OF SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/436647 [patent_app_country] => US [patent_app_date] => 2009-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 51 [patent_figures_cnt] => 51 [patent_no_of_words] => 17789 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20090215204.pdf [firstpage_image] =>[orig_patent_app_number] => 12436647 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/436647
Fabrication method of semiconductor device May 5, 2009 Issued
Array ( [id] => 4469372 [patent_doc_number] => 07943460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-17 [patent_title] => 'High-K metal gate CMOS' [patent_app_type] => utility [patent_app_number] => 12/426457 [patent_app_country] => US [patent_app_date] => 2009-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 14 [patent_no_of_words] => 7400 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/943/07943460.pdf [firstpage_image] =>[orig_patent_app_number] => 12426457 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/426457
High-K metal gate CMOS Apr 19, 2009 Issued
Array ( [id] => 4599526 [patent_doc_number] => 07977225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Reducing implant degradation in tilted implantations by shifting implantation masks' [patent_app_type] => utility [patent_app_number] => 12/417978 [patent_app_country] => US [patent_app_date] => 2009-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 8326 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977225.pdf [firstpage_image] =>[orig_patent_app_number] => 12417978 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/417978
Reducing implant degradation in tilted implantations by shifting implantation masks Apr 2, 2009 Issued
Array ( [id] => 5530644 [patent_doc_number] => 20090230432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-09-17 [patent_title] => 'Hybrid Substrates and Method of Manufacture' [patent_app_type] => utility [patent_app_number] => 12/400548 [patent_app_country] => US [patent_app_date] => 2009-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4553 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20090230432.pdf [firstpage_image] =>[orig_patent_app_number] => 12400548 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/400548
Hybrid substrates and method of manufacture Mar 8, 2009 Issued
Array ( [id] => 7965659 [patent_doc_number] => 07939361 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-05-10 [patent_title] => 'Semiconductor device and method for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/399437 [patent_app_country] => US [patent_app_date] => 2009-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 46 [patent_no_of_words] => 8694 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/939/07939361.pdf [firstpage_image] =>[orig_patent_app_number] => 12399437 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/399437
Semiconductor device and method for fabricating semiconductor device Mar 5, 2009 Issued
Array ( [id] => 5512089 [patent_doc_number] => 20090212393 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'METHOD OF MANUFACTURING AN ELECTRONIC DEVICE INCLUDING A PNP BIPOLAR TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 12/390639 [patent_app_country] => US [patent_app_date] => 2009-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3022 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0212/20090212393.pdf [firstpage_image] =>[orig_patent_app_number] => 12390639 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/390639
Method of manufacturing an electronic device including a PNP bipolar transistor Feb 22, 2009 Issued
Array ( [id] => 4515018 [patent_doc_number] => 07932148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Processes for manufacturing MOSFET devices with excessive round-hole shielded gate trench (SGT)' [patent_app_type] => utility [patent_app_number] => 12/378040 [patent_app_country] => US [patent_app_date] => 2009-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 2865 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932148.pdf [firstpage_image] =>[orig_patent_app_number] => 12378040 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/378040
Processes for manufacturing MOSFET devices with excessive round-hole shielded gate trench (SGT) Feb 8, 2009 Issued
Array ( [id] => 5278701 [patent_doc_number] => 20090130833 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-05-21 [patent_title] => 'INSULATING BUFFER FILM AND HIGH DIELECTRIC CONSTANT SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/357818 [patent_app_country] => US [patent_app_date] => 2009-01-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 15114 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0130/20090130833.pdf [firstpage_image] =>[orig_patent_app_number] => 12357818 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/357818
Insulating buffer film and high dielectric constant semiconductor device and method for fabricating the same Jan 21, 2009 Issued
Array ( [id] => 4600827 [patent_doc_number] => 07977794 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-12 [patent_title] => 'Aluminum metal line of a semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 12/351365 [patent_app_country] => US [patent_app_date] => 2009-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 2046 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/977/07977794.pdf [firstpage_image] =>[orig_patent_app_number] => 12351365 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/351365
Aluminum metal line of a semiconductor device and method of fabricating the same Jan 8, 2009 Issued
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