
Christy L. Novacek
Examiner (ID: 13644)
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822 |
| Total Applications | 465 |
| Issued Applications | 357 |
| Pending Applications | 12 |
| Abandoned Applications | 96 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6811719
[patent_doc_number] => 20030071269
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-17
[patent_title] => 'Apparatus and method for laser selective bonding technique for making sealed or enclosed microchannel structures'
[patent_app_type] => new
[patent_app_number] => 10/271307
[patent_app_country] => US
[patent_app_date] => 2002-10-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 4071
[patent_no_of_claims] => 25
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[patent_words_short_claim] => 42
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0071/20030071269.pdf
[firstpage_image] =>[orig_patent_app_number] => 10271307
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/271307 | Apparatus and method for laser selective bonding technique for making sealed or enclosed microchannel structures | Oct 14, 2002 | Abandoned |
Array
(
[id] => 6713791
[patent_doc_number] => 20030025139
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-06
[patent_title] => 'Method of forming a metal-insulator-metal capacitor for dual damascene interconnect processing and the device so formed'
[patent_app_type] => new
[patent_app_number] => 10/260613
[patent_app_country] => US
[patent_app_date] => 2002-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2598
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 45
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0025/20030025139.pdf
[firstpage_image] =>[orig_patent_app_number] => 10260613
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/260613 | Method of forming a metal-insulator-metal capacitor for dual damascene interconnect processing and the device so formed | Sep 26, 2002 | Issued |
Array
(
[id] => 826793
[patent_doc_number] => 07402457
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2008-07-22
[patent_title] => 'Method for making contact with electrical contact with electrical contact surfaces of substrate and device with substrate having electrical contact surfaces'
[patent_app_type] => utility
[patent_app_number] => 10/491137
[patent_app_country] => US
[patent_app_date] => 2002-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[patent_no_of_words] => 3339
[patent_no_of_claims] => 16
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[patent_words_short_claim] => 88
[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/402/07402457.pdf
[firstpage_image] =>[orig_patent_app_number] => 10491137
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/491137 | Method for making contact with electrical contact with electrical contact surfaces of substrate and device with substrate having electrical contact surfaces | Sep 24, 2002 | Issued |
Array
(
[id] => 7465146
[patent_doc_number] => 20040053439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-18
[patent_title] => 'Method for producing low-resistance ohmic contacts between substrates and wells in CMOS integrated circuits'
[patent_app_type] => new
[patent_app_number] => 10/245077
[patent_app_country] => US
[patent_app_date] => 2002-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2982
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 111
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0053/20040053439.pdf
[firstpage_image] =>[orig_patent_app_number] => 10245077
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/245077 | Method for producing low-resistance ohmic contacts between substrates and wells in CMOS integrated circuits | Sep 16, 2002 | Abandoned |
Array
(
[id] => 542714
[patent_doc_number] => 07166545
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2007-01-23
[patent_title] => 'Production method for semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 10/490767
[patent_app_country] => US
[patent_app_date] => 2002-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 26
[patent_no_of_words] => 7417
[patent_no_of_claims] => 12
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/166/07166545.pdf
[firstpage_image] =>[orig_patent_app_number] => 10490767
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/490767 | Production method for semiconductor device | Sep 16, 2002 | Issued |
Array
(
[id] => 1056956
[patent_doc_number] => 06856011
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-02-15
[patent_title] => 'Semiconductor chip package and method of fabricating same'
[patent_app_type] => utility
[patent_app_number] => 10/232652
[patent_app_country] => US
[patent_app_date] => 2002-09-03
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3786
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/856/06856011.pdf
[firstpage_image] =>[orig_patent_app_number] => 10232652
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/232652 | Semiconductor chip package and method of fabricating same | Sep 2, 2002 | Issued |
Array
(
[id] => 1220489
[patent_doc_number] => 06703267
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-03-09
[patent_title] => 'Method of manufacturing thin film transistor'
[patent_app_type] => B2
[patent_app_number] => 10/231045
[patent_app_country] => US
[patent_app_date] => 2002-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
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[patent_no_of_words] => 10294
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/703/06703267.pdf
[firstpage_image] =>[orig_patent_app_number] => 10231045
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/231045 | Method of manufacturing thin film transistor | Aug 29, 2002 | Issued |
Array
(
[id] => 1024560
[patent_doc_number] => 06884692
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-04-26
[patent_title] => 'Method for forming conductive material in opening and structures regarding same'
[patent_app_type] => utility
[patent_app_number] => 10/230887
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 25
[patent_no_of_words] => 9432
[patent_no_of_claims] => 71
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/884/06884692.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230887
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230887 | Method for forming conductive material in opening and structures regarding same | Aug 28, 2002 | Issued |
Array
(
[id] => 7061299
[patent_doc_number] => 20050003660
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2005-01-06
[patent_title] => 'Semiconductor device and production method therefor'
[patent_app_type] => utility
[patent_app_number] => 10/488187
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
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[patent_no_of_words] => 6521
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[pdf_file] => publications/A1/0003/20050003660.pdf
[firstpage_image] =>[orig_patent_app_number] => 10488187
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/488187 | Semiconductor device and production method therefor | Aug 28, 2002 | Abandoned |
Array
(
[id] => 6750547
[patent_doc_number] => 20030045067
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-03-06
[patent_title] => 'Semiconductor integrated circuit device and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 10/230107
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 44
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0045/20030045067.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230107
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230107 | Semiconductor integrated circuit device and manufacturing method which avoids oxidation of silicon plug during thermal treatment of capacitor insulating film | Aug 28, 2002 | Issued |
Array
(
[id] => 7135104
[patent_doc_number] => 20040043554
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-03-04
[patent_title] => 'Apparatus and method of increasing sram cell capacitance with metal fill'
[patent_app_type] => new
[patent_app_number] => 10/230457
[patent_app_country] => US
[patent_app_date] => 2002-08-29
[patent_effective_date] => 0000-00-00
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[patent_no_of_words] => 3600
[patent_no_of_claims] => 56
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[pdf_file] => publications/A1/0043/20040043554.pdf
[firstpage_image] =>[orig_patent_app_number] => 10230457
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/230457 | Apparatus and method of increasing sram cell capacitance with metal fill | Aug 28, 2002 | Issued |
Array
(
[id] => 6260581
[patent_doc_number] => 20020187607
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-12-12
[patent_title] => 'Method of forming a rough (high surface area) electrode from Ti and TiN capacitors and semiconductor devices including same'
[patent_app_type] => new
[patent_app_number] => 10/215513
[patent_app_country] => US
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[pdf_file] => publications/A1/0187/20020187607.pdf
[firstpage_image] =>[orig_patent_app_number] => 10215513
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/215513 | Method of forming a rough (high surface area) electrode from Ti and TiN capacitors and semiconductor devices including same | Aug 7, 2002 | Issued |
Array
(
[id] => 7309281
[patent_doc_number] => 20040142542
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2004-07-22
[patent_title] => 'Film or layer made of semi-conductive material and method for producing said film or layer'
[patent_app_type] => new
[patent_app_number] => 10/481537
[patent_app_country] => US
[patent_app_date] => 2003-12-18
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 10481537
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/481537 | Film or layer made of semi-conductive material and method for producing said film or layer | Jun 26, 2002 | Issued |
Array
(
[id] => 6715123
[patent_doc_number] => 20030026471
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-02-06
[patent_title] => 'Overlay marks, methods of overlay mark design and methods of overlay measurements'
[patent_app_type] => new
[patent_app_number] => 10/185737
[patent_app_country] => US
[patent_app_date] => 2002-06-26
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[firstpage_image] =>[orig_patent_app_number] => 10185737
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/185737 | Overlay marks, methods of overlay mark design and methods of overlay measurements | Jun 25, 2002 | Issued |
Array
(
[id] => 6755940
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[patent_issue_date] => 2003-01-02
[patent_title] => 'Method for forming a dual damascene line'
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[firstpage_image] =>[orig_patent_app_number] => 10178007
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/178007 | Method for forming a dual damascene line | Jun 20, 2002 | Abandoned |
Array
(
[id] => 6678604
[patent_doc_number] => 20030228745
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-12-11
[patent_title] => 'Method and system for making cobalt silicide'
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[patent_app_number] => 10/166307
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[pdf_file] => publications/A1/0228/20030228745.pdf
[firstpage_image] =>[orig_patent_app_number] => 10166307
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/166307 | Method and system for making cobalt silicide | Jun 9, 2002 | Issued |
Array
(
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Array
(
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[patent_title] => 'Method for manufacturing an isolation trench filled with a high-density plasma-chemical vapor deposition oxide'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/164927 | Method for manufacturing an isolation trench filled with a high-density plasma-chemical vapor deposition oxide | Jun 5, 2002 | Abandoned |
Array
(
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[patent_title] => 'Method and device for doping, diffusion and oxidation of silicon wafers under reduced pressure'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 10/477597 | Method and device for doping, diffusion and oxidation of silicon wafers under reduced pressure | May 13, 2002 | Issued |
Array
(
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[patent_title] => 'Thermal characterization compensation'
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[firstpage_image] =>[orig_patent_app_number] => 10077497
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/077497 | Thermal characterization compensation | Feb 14, 2002 | Issued |