
Christy L. Novacek
Examiner (ID: 13644)
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822 |
| Total Applications | 465 |
| Issued Applications | 357 |
| Pending Applications | 12 |
| Abandoned Applications | 96 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1167762
[patent_doc_number] => 06759710
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2004-07-06
[patent_title] => 'Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques'
[patent_app_type] => B2
[patent_app_number] => 10/051562
[patent_app_country] => US
[patent_app_date] => 2002-01-18
[patent_effective_date] => 0000-00-00
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/759/06759710.pdf
[firstpage_image] =>[orig_patent_app_number] => 10051562
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/051562 | Self-aligned double-gate MOSFET by selective epitaxy and silicon wafer bonding techniques | Jan 17, 2002 | Issued |
Array
(
[id] => 1580912
[patent_doc_number] => 06423556
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2002-07-23
[patent_title] => 'Method for evaluating impurity concentrations in heat treatment furnaces'
[patent_app_type] => B1
[patent_app_number] => 10/003994
[patent_app_country] => US
[patent_app_date] => 2001-11-14
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[pdf_file] => patents/06/423/06423556.pdf
[firstpage_image] =>[orig_patent_app_number] => 10003994
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/003994 | Method for evaluating impurity concentrations in heat treatment furnaces | Nov 13, 2001 | Issued |
Array
(
[id] => 1288495
[patent_doc_number] => 06632688
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-10-14
[patent_title] => 'Method for evaluating impurity concentrations in epitaxial reagent gases'
[patent_app_type] => B2
[patent_app_number] => 10/003961
[patent_app_country] => US
[patent_app_date] => 2001-11-14
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[pdf_file] => patents/06/632/06632688.pdf
[firstpage_image] =>[orig_patent_app_number] => 10003961
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/003961 | Method for evaluating impurity concentrations in epitaxial reagent gases | Nov 13, 2001 | Issued |
Array
(
[id] => 5986181
[patent_doc_number] => 20020098601
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-25
[patent_title] => 'Method for evaluating impurity concentrations in unpolished wafers grown by the Czochralski method'
[patent_app_type] => new
[patent_app_number] => 10/004065
[patent_app_country] => US
[patent_app_date] => 2001-11-14
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 10004065
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/004065 | Method for evaluating impurity concentrations in unpolished wafers grown by the Czochralski method | Nov 13, 2001 | Issued |
Array
(
[id] => 1273599
[patent_doc_number] => 06649427
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-18
[patent_title] => 'Method for evaluating impurity concentrations in epitaxial susceptors'
[patent_app_type] => B2
[patent_app_number] => 10/003960
[patent_app_country] => US
[patent_app_date] => 2001-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[pdf_file] => patents/06/649/06649427.pdf
[firstpage_image] =>[orig_patent_app_number] => 10003960
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/003960 | Method for evaluating impurity concentrations in epitaxial susceptors | Nov 13, 2001 | Issued |
| 10/009386 | REFLECTIVE LAYER BURIED IN SILICON AND METHOD OF FABRICATION | Nov 4, 2001 | Abandoned |
Array
(
[id] => 1278004
[patent_doc_number] => 06645860
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2003-11-11
[patent_title] => 'Adhesion promotion method for CVD copper metallization in IC applications'
[patent_app_type] => B2
[patent_app_number] => 10/002886
[patent_app_country] => US
[patent_app_date] => 2001-11-01
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/06/645/06645860.pdf
[firstpage_image] =>[orig_patent_app_number] => 10002886
[rel_patent_id] =>[rel_patent_doc_number] =>) 10/002886 | Adhesion promotion method for CVD copper metallization in IC applications | Oct 31, 2001 | Issued |
Array
(
[id] => 5986524
[patent_doc_number] => 20020098712
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-07-25
[patent_title] => 'Multi-thickness oxide growth with in-situ scanned laser heating'
[patent_app_type] => new
[patent_app_number] => 09/982657
[patent_app_country] => US
[patent_app_date] => 2001-10-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => publications/A1/0098/20020098712.pdf
[firstpage_image] =>[orig_patent_app_number] => 09982657
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/982657 | Multi-thickness oxide growth with in-situ scanned laser heating | Oct 17, 2001 | Abandoned |
Array
(
[id] => 5870549
[patent_doc_number] => 20020047131
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Selective placement of quantum wells in flipchip light emitting diodes for improved light extraction'
[patent_app_type] => new
[patent_app_number] => 09/977144
[patent_app_country] => US
[patent_app_date] => 2001-10-11
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0047/20020047131.pdf
[firstpage_image] =>[orig_patent_app_number] => 09977144
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/977144 | Selective placement of quantum wells in flipchip light emitting diodes for improved light extraction | Oct 10, 2001 | Abandoned |
Array
(
[id] => 1395971
[patent_doc_number] => 06531328
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-03-11
[patent_title] => 'Packaging of light-emitting diode'
[patent_app_type] => B1
[patent_app_number] => 09/973777
[patent_app_country] => US
[patent_app_date] => 2001-10-11
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[firstpage_image] =>[orig_patent_app_number] => 09973777
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/973777 | Packaging of light-emitting diode | Oct 10, 2001 | Issued |
Array
(
[id] => 6783093
[patent_doc_number] => 20030064540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2003-04-03
[patent_title] => 'Procedure for encapsulation of electronic devices'
[patent_app_type] => new
[patent_app_number] => 09/968567
[patent_app_country] => US
[patent_app_date] => 2001-09-28
[patent_effective_date] => 0000-00-00
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[pdf_file] => publications/A1/0064/20030064540.pdf
[firstpage_image] =>[orig_patent_app_number] => 09968567
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/968567 | Procedure for encapsulation of electronic devices | Sep 27, 2001 | Issued |
Array
(
[id] => 1273703
[patent_doc_number] => 06649447
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2003-11-18
[patent_title] => 'Methods for plastic injection molding, with particular applicability in facilitating use of high density lead frames'
[patent_app_type] => B1
[patent_app_number] => 09/965214
[patent_app_country] => US
[patent_app_date] => 2001-09-26
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[pdf_file] => patents/06/649/06649447.pdf
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/965214 | Methods for plastic injection molding, with particular applicability in facilitating use of high density lead frames | Sep 25, 2001 | Issued |
Array
(
[id] => 6674362
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[patent_title] => 'Method for screening semiconductor devices for contact coplanarity'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/962407 | Method for screening semiconductor devices for contact coplanarity | Sep 24, 2001 | Issued |
Array
(
[id] => 968473
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[patent_title] => 'Multiple selectable function integrated circuit module'
[patent_app_type] => utility
[patent_app_number] => 09/961767
[patent_app_country] => US
[patent_app_date] => 2001-09-21
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Array
(
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[patent_title] => 'Dielectric element including oxide-based dielectric film and method of fabricating the same'
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Array
(
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[patent_title] => 'Microelectronic mechanical system and methods'
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Array
(
[id] => 1216519
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[patent_issue_date] => 2004-03-16
[patent_title] => 'Bonding pad interface'
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[firstpage_image] =>[orig_patent_app_number] => 09949207
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/949207 | Bonding pad interface | Sep 6, 2001 | Issued |
Array
(
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[patent_title] => 'Poly-silicon thin film transistor and method for fabricating thereof'
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Array
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Array
(
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[patent_title] => 'METHOD OF FORMING A MULTI-LAYERED WIRING STRUCTURE INCORPORATION IN SEMICONDUCTOR INTERGRATED CIRCUIT DEVICE AND HAVING LARGE ELECTROMIGRATION RESISTANCE.'
[patent_app_type] => new
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