
Christy L. Novacek
Examiner (ID: 17383)
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822 |
| Total Applications | 465 |
| Issued Applications | 357 |
| Pending Applications | 12 |
| Abandoned Applications | 96 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9924680
[patent_doc_number] => 08982654
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-03-17
[patent_title] => 'DRAM sub-array level refresh'
[patent_app_type] => utility
[patent_app_number] => 14/088098
[patent_app_country] => US
[patent_app_date] => 2013-11-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/088098 | DRAM sub-array level refresh | Nov 21, 2013 | Issued |
Array
(
[id] => 11095619
[patent_doc_number] => 20160292588
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-10-06
[patent_title] => 'A METHOD AND AN APPARATUS FOR EFFICIENT DATA PROCESSING'
[patent_app_type] => utility
[patent_app_number] => 15/038453
[patent_app_country] => US
[patent_app_date] => 2013-11-22
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Array
(
[id] => 9669474
[patent_doc_number] => 20140233337
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-08-21
[patent_title] => 'NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/087444
[patent_app_country] => US
[patent_app_date] => 2013-11-22
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/087444 | Nonvolatile memory device and memory system including the same | Nov 21, 2013 | Issued |
Array
(
[id] => 9819378
[patent_doc_number] => 08929173
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-01-06
[patent_title] => 'Data strobe control device'
[patent_app_type] => utility
[patent_app_number] => 14/085930
[patent_app_country] => US
[patent_app_date] => 2013-11-21
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/085930 | Data strobe control device | Nov 20, 2013 | Issued |
Array
(
[id] => 10899855
[patent_doc_number] => 08923084
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-12-30
[patent_title] => 'Memory and memory system including the same'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/086506 | Memory and memory system including the same | Nov 20, 2013 | Issued |
Array
(
[id] => 9733426
[patent_doc_number] => 20140269135
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[patent_kind] => A1
[patent_issue_date] => 2014-09-18
[patent_title] => 'CIRCUIT AND SYSTEM FOR CONCURRENTLY PROGRAMMING MULTIPLE BITS OF OTP MEMORY DEVICES'
[patent_app_type] => utility
[patent_app_number] => 14/085228
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/085228 | Circuit and system for concurrently programming multiple bits of OTP memory devices | Nov 19, 2013 | Issued |
Array
(
[id] => 9877159
[patent_doc_number] => 08964440
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[patent_issue_date] => 2015-02-24
[patent_title] => 'Stacked semiconductor devices including a master device'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/082454 | Stacked semiconductor devices including a master device | Nov 17, 2013 | Issued |
Array
(
[id] => 9470737
[patent_doc_number] => 08724380
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-05-13
[patent_title] => 'Method for reading and writing multi-level cells'
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[patent_app_number] => 14/079518
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/079518 | Method for reading and writing multi-level cells | Nov 12, 2013 | Issued |
Array
(
[id] => 10893934
[patent_doc_number] => 08917560
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2014-12-23
[patent_title] => 'Half bit line high level voltage genertor, memory device and driving method'
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[patent_app_number] => 14/079613
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[patent_app_date] => 2013-11-13
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Array
(
[id] => 9870457
[patent_doc_number] => 08958237
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[patent_issue_date] => 2015-02-17
[patent_title] => 'Static random access memory timing tracking circuit'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/078895 | Static random access memory timing tracking circuit | Nov 12, 2013 | Issued |
Array
(
[id] => 9819335
[patent_doc_number] => 08929130
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-01-06
[patent_title] => 'Two-port SRAM cell structure'
[patent_app_type] => utility
[patent_app_number] => 14/077314
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/077314 | Two-port SRAM cell structure | Nov 11, 2013 | Issued |
Array
(
[id] => 10408129
[patent_doc_number] => 20150293138
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-10-15
[patent_title] => 'METHOD TO DETERMINE A DIRECTION AND AMPLITUDE OF A CURRENT VELOCITY ESTIMATE OF A MOVING DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/440149 | METHOD TO DETERMINE A DIRECTION AND AMPLITUDE OF A CURRENT VELOCITY ESTIMATE OF A MOVING DEVICE | Nov 6, 2013 | Abandoned |
Array
(
[id] => 10391437
[patent_doc_number] => 20150276443
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[patent_kind] => A1
[patent_issue_date] => 2015-10-01
[patent_title] => 'DEVICE AND METHOD FOR ESTIMATING A FLOW OF GAS IN AN ENCLOSURE MAINTAINED AT REDUCED PRESSURE IN RELATION TO THE GAS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/440264 | Device and method for estimating a flow of gas in an enclosure maintained at reduced pressure in relation to the gas | Nov 5, 2013 | Issued |
Array
(
[id] => 9664060
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[patent_title] => 'Power reduction circuit and method'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/051946 | Power reduction circuit and method | Oct 10, 2013 | Issued |
Array
(
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Array
(
[id] => 9516846
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[patent_title] => 'MEMORY SYSTEM AND METHOD OF OPERATING MEMORY SYSTEM USING SOFT READ VOLTAGES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/050430 | Memory system and method of operating memory system using soft read voltages | Oct 9, 2013 | Issued |
Array
(
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Array
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Array
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