Search

Christy L. Novacek

Examiner (ID: 17383)

Most Active Art Unit
2822
Art Unit(s)
2822
Total Applications
465
Issued Applications
357
Pending Applications
12
Abandoned Applications
96

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9577012 [patent_doc_number] => 08767439 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-01 [patent_title] => 'Resistance change nonvolatile memory device, semiconductor device, and method of operating resistance change nonvolatile memory device' [patent_app_type] => utility [patent_app_number] => 13/563604 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 50 [patent_no_of_words] => 15487 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13563604 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/563604
Resistance change nonvolatile memory device, semiconductor device, and method of operating resistance change nonvolatile memory device Jul 30, 2012 Issued
Array ( [id] => 9456793 [patent_doc_number] => 08717810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-05-06 [patent_title] => 'Phase change memory device and computing system having the same' [patent_app_type] => utility [patent_app_number] => 13/562650 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 11307 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562650 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562650
Phase change memory device and computing system having the same Jul 30, 2012 Issued
Array ( [id] => 9583918 [patent_doc_number] => 08773923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-08 [patent_title] => 'Memory device and method for writing therefor' [patent_app_type] => utility [patent_app_number] => 13/562222 [patent_app_country] => US [patent_app_date] => 2012-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8066 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562222 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562222
Memory device and method for writing therefor Jul 29, 2012 Issued
Array ( [id] => 8676902 [patent_doc_number] => 08385023 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-26 [patent_title] => 'Printed circuit cable assembly for a hard disk drive' [patent_app_type] => utility [patent_app_number] => 13/542774 [patent_app_country] => US [patent_app_date] => 2012-07-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3376 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13542774 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/542774
Printed circuit cable assembly for a hard disk drive Jul 5, 2012 Issued
Array ( [id] => 9274671 [patent_doc_number] => 08638613 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-28 [patent_title] => 'Flash memory' [patent_app_type] => utility [patent_app_number] => 13/538827 [patent_app_country] => US [patent_app_date] => 2012-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13538827 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/538827
Flash memory Jun 28, 2012 Issued
Array ( [id] => 8798301 [patent_doc_number] => 08437179 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-07 [patent_title] => 'Semiconductor integrated circuit device with reduced leakage current' [patent_app_type] => utility [patent_app_number] => 13/528025 [patent_app_country] => US [patent_app_date] => 2012-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 29 [patent_no_of_words] => 14755 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 461 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13528025 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/528025
Semiconductor integrated circuit device with reduced leakage current Jun 19, 2012 Issued
Array ( [id] => 8864704 [patent_doc_number] => 20130148407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-13 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND READ METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 13/700346 [patent_app_country] => US [patent_app_date] => 2012-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 19347 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13700346 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/700346
Nonvolatile semiconductor memory device and read method for the same Jun 17, 2012 Issued
Array ( [id] => 8404583 [patent_doc_number] => 20120236642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-09-20 [patent_title] => 'INTEGRATED CIRCUIT SELF ALIGNED 3D MEMORY ARRAY AND MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 13/482843 [patent_app_country] => US [patent_app_date] => 2012-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 11481 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13482843 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/482843
Integrated circuit self aligned 3D memory array and manufacturing method May 28, 2012 Issued
Array ( [id] => 9028019 [patent_doc_number] => 08537607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-17 [patent_title] => 'Staggered magnetic tunnel junction' [patent_app_type] => utility [patent_app_number] => 13/477198 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 5480 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477198 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477198
Staggered magnetic tunnel junction May 21, 2012 Issued
Array ( [id] => 9377294 [patent_doc_number] => 08681564 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-25 [patent_title] => 'Systems and methods for generating soft information in NAND flash' [patent_app_type] => utility [patent_app_number] => 13/477678 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477678 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477678
Systems and methods for generating soft information in NAND flash May 21, 2012 Issued
Array ( [id] => 8515082 [patent_doc_number] => 20120314490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'MAGNETIC MEMORY SYSTEM AND METHODS IN VARIOUS MODES OF OPERATION' [patent_app_type] => utility [patent_app_number] => 13/477970 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6168 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477970 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477970
Magnetic memory system and methods in various modes of operation May 21, 2012 Issued
Array ( [id] => 8501160 [patent_doc_number] => 20120300569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'MEMORY SYSTEM AND REFRESH CONTROL METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/477300 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5068 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477300 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477300
Memory system and refresh control method thereof May 21, 2012 Issued
Array ( [id] => 9553887 [patent_doc_number] => 08760946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-06-24 [patent_title] => 'Method and apparatus for memory access delay training' [patent_app_type] => utility [patent_app_number] => 13/477642 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4780 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477642 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477642
Method and apparatus for memory access delay training May 21, 2012 Issued
Array ( [id] => 8501152 [patent_doc_number] => 20120300560 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICES INCLUDING PRECHARGE USING ISOLATED VOLTAGES' [patent_app_type] => utility [patent_app_number] => 13/477448 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 7697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477448 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477448
Semiconductor memory devices including precharge using isolated voltages May 21, 2012 Issued
Array ( [id] => 9160090 [patent_doc_number] => 20130308367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'STRUCTURE AND METHOD FOR FORMING CONDUCTIVE PATH IN RESISTIVE RANDOM-ACCESS MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/476366 [patent_app_country] => US [patent_app_date] => 2012-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3309 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476366 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/476366
Structure and method for forming conductive path in resistive random-access memory device May 20, 2012 Issued
Array ( [id] => 8501153 [patent_doc_number] => 20120300561 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'MEMORY DEVICES AND PROGRAM METHODS THEREOF' [patent_app_type] => utility [patent_app_number] => 13/476196 [patent_app_country] => US [patent_app_date] => 2012-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476196 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/476196
Memory devices and program methods thereof May 20, 2012 Issued
Array ( [id] => 9160130 [patent_doc_number] => 20130308407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-21 [patent_title] => 'CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DISTURBS IN SEMICONDUCTOR MEMORIES' [patent_app_type] => utility [patent_app_number] => 13/476218 [patent_app_country] => US [patent_app_date] => 2012-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6921 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13476218 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/476218
Controlling a voltage level of an access signal to reduce access disturbs in semiconductor memories May 20, 2012 Issued
Array ( [id] => 8515081 [patent_doc_number] => 20120314489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-13 [patent_title] => 'SYSTEMS AND METHODS FOR DIRECT COMMUNICATION BETWEEN MAGNETIC TUNNEL JUNCTIONS' [patent_app_type] => utility [patent_app_number] => 13/475544 [patent_app_country] => US [patent_app_date] => 2012-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 8201 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13475544 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/475544
Systems and methods for direct communication between magnetic tunnel junctions May 17, 2012 Issued
Array ( [id] => 8508141 [patent_doc_number] => 20120307549 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-12-06 [patent_title] => 'Nonvolatile Latch Circuit' [patent_app_type] => utility [patent_app_number] => 13/475332 [patent_app_country] => US [patent_app_date] => 2012-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7094 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13475332 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/475332
Nonvolatile latch circuit May 17, 2012 Issued
Array ( [id] => 9356858 [patent_doc_number] => 08675404 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-18 [patent_title] => 'Reading method of non-volatile memory device' [patent_app_type] => utility [patent_app_number] => 13/475204 [patent_app_country] => US [patent_app_date] => 2012-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 9052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13475204 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/475204
Reading method of non-volatile memory device May 17, 2012 Issued
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