
Christy L. Novacek
Examiner (ID: 17383)
| Most Active Art Unit | 2822 |
| Art Unit(s) | 2822 |
| Total Applications | 465 |
| Issued Applications | 357 |
| Pending Applications | 12 |
| Abandoned Applications | 96 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9577012
[patent_doc_number] => 08767439
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-01
[patent_title] => 'Resistance change nonvolatile memory device, semiconductor device, and method of operating resistance change nonvolatile memory device'
[patent_app_type] => utility
[patent_app_number] => 13/563604
[patent_app_country] => US
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/563604 | Resistance change nonvolatile memory device, semiconductor device, and method of operating resistance change nonvolatile memory device | Jul 30, 2012 | Issued |
Array
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[patent_doc_number] => 08717810
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[patent_issue_date] => 2014-05-06
[patent_title] => 'Phase change memory device and computing system having the same'
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Array
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[patent_title] => 'Memory device and method for writing therefor'
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Array
(
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[patent_issue_date] => 2013-02-26
[patent_title] => 'Printed circuit cable assembly for a hard disk drive'
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Array
(
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[patent_issue_date] => 2014-01-28
[patent_title] => 'Flash memory'
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Array
(
[id] => 8798301
[patent_doc_number] => 08437179
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[patent_issue_date] => 2013-05-07
[patent_title] => 'Semiconductor integrated circuit device with reduced leakage current'
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Array
(
[id] => 8864704
[patent_doc_number] => 20130148407
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[patent_kind] => A1
[patent_issue_date] => 2013-06-13
[patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND READ METHOD FOR THE SAME'
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[patent_app_number] => 13/700346
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/700346 | Nonvolatile semiconductor memory device and read method for the same | Jun 17, 2012 | Issued |
Array
(
[id] => 8404583
[patent_doc_number] => 20120236642
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[patent_kind] => A1
[patent_issue_date] => 2012-09-20
[patent_title] => 'INTEGRATED CIRCUIT SELF ALIGNED 3D MEMORY ARRAY AND MANUFACTURING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/482843
[patent_app_country] => US
[patent_app_date] => 2012-05-29
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/482843 | Integrated circuit self aligned 3D memory array and manufacturing method | May 28, 2012 | Issued |
Array
(
[id] => 9028019
[patent_doc_number] => 08537607
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[patent_kind] => B2
[patent_issue_date] => 2013-09-17
[patent_title] => 'Staggered magnetic tunnel junction'
[patent_app_type] => utility
[patent_app_number] => 13/477198
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/477198 | Staggered magnetic tunnel junction | May 21, 2012 | Issued |
Array
(
[id] => 9377294
[patent_doc_number] => 08681564
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[patent_issue_date] => 2014-03-25
[patent_title] => 'Systems and methods for generating soft information in NAND flash'
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[patent_app_number] => 13/477678
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/477678 | Systems and methods for generating soft information in NAND flash | May 21, 2012 | Issued |
Array
(
[id] => 8515082
[patent_doc_number] => 20120314490
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-13
[patent_title] => 'MAGNETIC MEMORY SYSTEM AND METHODS IN VARIOUS MODES OF OPERATION'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/477970 | Magnetic memory system and methods in various modes of operation | May 21, 2012 | Issued |
Array
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[id] => 8501160
[patent_doc_number] => 20120300569
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[patent_title] => 'MEMORY SYSTEM AND REFRESH CONTROL METHOD THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/477300 | Memory system and refresh control method thereof | May 21, 2012 | Issued |
Array
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Array
(
[id] => 8501152
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[patent_title] => 'SEMICONDUCTOR MEMORY DEVICES INCLUDING PRECHARGE USING ISOLATED VOLTAGES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/477448 | Semiconductor memory devices including precharge using isolated voltages | May 21, 2012 | Issued |
Array
(
[id] => 9160090
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[patent_issue_date] => 2013-11-21
[patent_title] => 'STRUCTURE AND METHOD FOR FORMING CONDUCTIVE PATH IN RESISTIVE RANDOM-ACCESS MEMORY DEVICE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/476366 | Structure and method for forming conductive path in resistive random-access memory device | May 20, 2012 | Issued |
Array
(
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[patent_title] => 'MEMORY DEVICES AND PROGRAM METHODS THEREOF'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/476196 | Memory devices and program methods thereof | May 20, 2012 | Issued |
Array
(
[id] => 9160130
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[patent_title] => 'CONTROLLING A VOLTAGE LEVEL OF AN ACCESS SIGNAL TO REDUCE ACCESS DISTURBS IN SEMICONDUCTOR MEMORIES'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/476218 | Controlling a voltage level of an access signal to reduce access disturbs in semiconductor memories | May 20, 2012 | Issued |
Array
(
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[patent_title] => 'SYSTEMS AND METHODS FOR DIRECT COMMUNICATION BETWEEN MAGNETIC TUNNEL JUNCTIONS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 13/475544 | Systems and methods for direct communication between magnetic tunnel junctions | May 17, 2012 | Issued |
Array
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Array
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