
Chun Kuan Lee
Examiner (ID: 2634, Phone: (571)272-0671 , Office: P/2181 )
| Most Active Art Unit | 2181 |
| Art Unit(s) | 2181 |
| Total Applications | 797 |
| Issued Applications | 493 |
| Pending Applications | 82 |
| Abandoned Applications | 248 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18981985
[patent_doc_number] => 11907158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Vector processor with vector first and multiple lane configuration
[patent_app_type] => utility
[patent_app_number] => 17/135465
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 10837
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 305
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135465
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/135465 | Vector processor with vector first and multiple lane configuration | Dec 27, 2020 | Issued |
Array
(
[id] => 17613794
[patent_doc_number] => 20220156074
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => ELECTRONIC DEVICE AND MULTIPLEXING METHOD OF SPATIAL
[patent_app_type] => utility
[patent_app_number] => 17/135088
[patent_app_country] => US
[patent_app_date] => 2020-12-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5923
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17135088
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/135088 | Electronic device and multiplexing method of spatial | Dec 27, 2020 | Issued |
Array
(
[id] => 17364905
[patent_doc_number] => 11231926
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-01-25
[patent_title] => Arithmetic processing unit and control method for arithmetic processing unit
[patent_app_type] => utility
[patent_app_number] => 17/114549
[patent_app_country] => US
[patent_app_date] => 2020-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 12572
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 463
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17114549
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/114549 | Arithmetic processing unit and control method for arithmetic processing unit | Dec 7, 2020 | Issued |
Array
(
[id] => 16903157
[patent_doc_number] => 20210182073
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => MODULAR, EXTENSIBLE COMPUTER PROCESSING ARCHITECTURE
[patent_app_type] => utility
[patent_app_number] => 17/115195
[patent_app_country] => US
[patent_app_date] => 2020-12-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10290
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17115195
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/115195 | Modular, extensible computer processing architecture | Dec 7, 2020 | Issued |
Array
(
[id] => 16630391
[patent_doc_number] => 20210049044
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-18
[patent_title] => SLAB MEMORY ALLOCATOR WITH DYNAMIC BUFFER RESIZING
[patent_app_type] => utility
[patent_app_number] => 17/088192
[patent_app_country] => US
[patent_app_date] => 2020-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7718
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17088192
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/088192 | Slab memory allocator with dynamic buffer resizing | Nov 2, 2020 | Issued |
Array
(
[id] => 17861719
[patent_doc_number] => 11442877
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-13
[patent_title] => Data bus duty cycle distortion compensation
[patent_app_type] => utility
[patent_app_number] => 16/949510
[patent_app_country] => US
[patent_app_date] => 2020-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 8244
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16949510
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/949510 | Data bus duty cycle distortion compensation | Oct 29, 2020 | Issued |
Array
(
[id] => 19780000
[patent_doc_number] => 12229033
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-18
[patent_title] => Method, device, and program product for managing computing resource in storage system
[patent_app_type] => utility
[patent_app_number] => 17/063274
[patent_app_country] => US
[patent_app_date] => 2020-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 12
[patent_no_of_words] => 8101
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 245
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17063274
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/063274 | Method, device, and program product for managing computing resource in storage system | Oct 4, 2020 | Issued |
Array
(
[id] => 17484343
[patent_doc_number] => 20220091847
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => PREFETCHING FROM INDIRECT BUFFERS AT A PROCESSING UNIT
[patent_app_type] => utility
[patent_app_number] => 17/029841
[patent_app_country] => US
[patent_app_date] => 2020-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4639
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17029841
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/029841 | PREFETCHING FROM INDIRECT BUFFERS AT A PROCESSING UNIT | Sep 22, 2020 | Abandoned |
Array
(
[id] => 17446460
[patent_doc_number] => 20220066965
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => METHOD, SYSTEM AND DEVICE FOR MODIFYING AN OPTION OF A BASIC INPUT OUTPUT SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/029063
[patent_app_country] => US
[patent_app_date] => 2020-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2676
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17029063
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/029063 | METHOD, SYSTEM AND DEVICE FOR MODIFYING AN OPTION OF A BASIC INPUT OUTPUT SYSTEM | Sep 22, 2020 | Abandoned |
Array
(
[id] => 16543473
[patent_doc_number] => 20200409888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-31
[patent_title] => METHOD FOR DETERMINING ROLE OF ELECTRONIC DEVICE AND ELECTRONIC DEVICE THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/022903
[patent_app_country] => US
[patent_app_date] => 2020-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15240
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 153
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17022903
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/022903 | METHOD FOR DETERMINING ROLE OF ELECTRONIC DEVICE AND ELECTRONIC DEVICE THEREOF | Sep 15, 2020 | Abandoned |
Array
(
[id] => 17446453
[patent_doc_number] => 20220066958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => Tunable and Scalable Command/Address Protocol for Non-Volatile Memory
[patent_app_type] => utility
[patent_app_number] => 17/008553
[patent_app_country] => US
[patent_app_date] => 2020-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7353
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17008553
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/008553 | Tunable and scalable command/address protocol for non-volatile memory | Aug 30, 2020 | Issued |
Array
(
[id] => 17446473
[patent_doc_number] => 20220066978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-03
[patent_title] => MISSED CLOCK COMPENSATION FOR RADIO FREQUENCY FRONT END TIMED-TRIGGER ACCURACY
[patent_app_type] => utility
[patent_app_number] => 17/005158
[patent_app_country] => US
[patent_app_date] => 2020-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9886
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17005158
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/005158 | MISSED CLOCK COMPENSATION FOR RADIO FREQUENCY FRONT END TIMED-TRIGGER ACCURACY | Aug 26, 2020 | Abandoned |
Array
(
[id] => 16714193
[patent_doc_number] => 20210081340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-18
[patent_title] => CONTROLLING THE APPLICATION TIME OF RADIO FREQUENCY FRONT END TRIGGERS BASED ON EXECUTION OF SEQUENCES
[patent_app_type] => utility
[patent_app_number] => 17/003697
[patent_app_country] => US
[patent_app_date] => 2020-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10620
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -26
[patent_words_short_claim] => 53
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17003697
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/003697 | Controlling the application time of radio frequency front end triggers based on execution of sequences | Aug 25, 2020 | Issued |
Array
(
[id] => 17853924
[patent_doc_number] => 20220283966
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-08
[patent_title] => SIGNAL PROCESSOR, PROCESSOR SYSTEM AND METHOD FOR TRANSFERRING DATA
[patent_app_type] => utility
[patent_app_number] => 17/637254
[patent_app_country] => US
[patent_app_date] => 2020-08-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4939
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -13
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17637254
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/637254 | Signal processor, processor system and method for transferring data | Aug 19, 2020 | Issued |
Array
(
[id] => 16623464
[patent_doc_number] => 20210042117
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-11
[patent_title] => Data Processing Apparatus and Method
[patent_app_type] => utility
[patent_app_number] => 16/987499
[patent_app_country] => US
[patent_app_date] => 2020-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5758
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16987499
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/987499 | Data Processing Apparatus and Method | Aug 6, 2020 | Pending |
Array
(
[id] => 16615717
[patent_doc_number] => 20210034370
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-02-04
[patent_title] => SELECTIVELY PERFORMING AHEAD BRANCH PREDICTION BASED ON TYPES OF BRANCH INSTRUCTIONS
[patent_app_type] => utility
[patent_app_number] => 16/945275
[patent_app_country] => US
[patent_app_date] => 2020-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8328
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16945275
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/945275 | Selectively performing ahead branch prediction based on types of branch instructions | Jul 30, 2020 | Issued |
Array
(
[id] => 17970010
[patent_doc_number] => 11487542
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-01
[patent_title] => Instruction cache behavior and branch prediction
[patent_app_type] => utility
[patent_app_number] => 16/933197
[patent_app_country] => US
[patent_app_date] => 2020-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 8831
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16933197
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/933197 | Instruction cache behavior and branch prediction | Jul 19, 2020 | Issued |
Array
(
[id] => 17589482
[patent_doc_number] => 11327755
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-10
[patent_title] => Fine grained control flow enforcement to mitigate malicious call/jump oriented programming
[patent_app_type] => utility
[patent_app_number] => 16/946545
[patent_app_country] => US
[patent_app_date] => 2020-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 20
[patent_no_of_words] => 15189
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16946545
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/946545 | Fine grained control flow enforcement to mitigate malicious call/jump oriented programming | Jun 25, 2020 | Issued |
Array
(
[id] => 16751524
[patent_doc_number] => 20210103533
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-04-08
[patent_title] => MEMORY SYSTEM AND MEMORY CHIP
[patent_app_type] => utility
[patent_app_number] => 16/904597
[patent_app_country] => US
[patent_app_date] => 2020-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8692
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 57
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16904597
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/904597 | MEMORY SYSTEM AND MEMORY CHIP | Jun 17, 2020 | Pending |
Array
(
[id] => 17294593
[patent_doc_number] => 20210390432
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-16
[patent_title] => SYSTEM AND METHOD FOR AUTOMATING OBSERVE-ORIENT-DECIDE-ACT (OODA) LOOP ENABLING COGNITIVE AUTONOMOUS AGENT SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 16/902981
[patent_app_country] => US
[patent_app_date] => 2020-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9697
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16902981
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/902981 | System and method for automating observe-orient-decide-act (OODA) loop enabling cognitive autonomous agent systems | Jun 15, 2020 | Issued |