
Chuong A. Luu
Examiner (ID: 3640, Phone: (571)272-1902 , Office: P/2898 )
| Most Active Art Unit | 2898 |
| Art Unit(s) | 2825, 2898, 2892, 2818 |
| Total Applications | 2166 |
| Issued Applications | 1978 |
| Pending Applications | 24 |
| Abandoned Applications | 175 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15274309
[patent_doc_number] => 20190385889
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-12-19
[patent_title] => ADHESIVE TAPE FOR SEMICONDUCTOR PROCESSING AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/558607
[patent_app_country] => US
[patent_app_date] => 2019-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13455
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16558607
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/558607 | Adhesive tape for semiconductor processing and method for producing semiconductor device | Sep 2, 2019 | Issued |
Array
(
[id] => 16936437
[patent_doc_number] => 20210202326
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => METHOD FOR MANUFACTURING A CFET DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/250767
[patent_app_country] => US
[patent_app_date] => 2019-09-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6602
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 203
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17250767
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/250767 | Method for manufacturing a CFET device | Sep 2, 2019 | Issued |
Array
(
[id] => 15657051
[patent_doc_number] => 20200091056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-19
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/547960
[patent_app_country] => US
[patent_app_date] => 2019-08-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4628
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547960
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/547960 | Semiconductor device | Aug 21, 2019 | Issued |
Array
(
[id] => 15154469
[patent_doc_number] => 20190355712
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/528177
[patent_app_country] => US
[patent_app_date] => 2019-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 14084
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 33
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16528177
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/528177 | Semiconductor device | Jul 30, 2019 | Issued |
Array
(
[id] => 15154275
[patent_doc_number] => 20190355615
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-11-21
[patent_title] => METHODS, APPARATUS, AND SYSTEM FOR A SEMICONDUCTOR DEVICE COMPRISING GATES WITH SHORT HEIGHTS
[patent_app_type] => utility
[patent_app_number] => 16/525601
[patent_app_country] => US
[patent_app_date] => 2019-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5192
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525601
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/525601 | METHODS, APPARATUS, AND SYSTEM FOR A SEMICONDUCTOR DEVICE COMPRISING GATES WITH SHORT HEIGHTS | Jul 29, 2019 | Abandoned |
Array
(
[id] => 16566981
[patent_doc_number] => 10892358
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2021-01-12
[patent_title] => Insulating structure of high electron mobility transistor and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 16/525525
[patent_app_country] => US
[patent_app_date] => 2019-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 2948
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525525
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/525525 | Insulating structure of high electron mobility transistor and manufacturing method thereof | Jul 28, 2019 | Issued |
Array
(
[id] => 15717801
[patent_doc_number] => 20200105668
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-02
[patent_title] => VIAS WITH METAL CAPS FOR UNDERLYING CONDUCTIVE LINES
[patent_app_type] => utility
[patent_app_number] => 16/525186
[patent_app_country] => US
[patent_app_date] => 2019-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9889
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16525186
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/525186 | Vias with metal caps for underlying conductive lines | Jul 28, 2019 | Issued |
Array
(
[id] => 15442923
[patent_doc_number] => 20200035645
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-01-30
[patent_title] => Chip Assembly and Method of Manufacturing Thereof
[patent_app_type] => utility
[patent_app_number] => 16/523789
[patent_app_country] => US
[patent_app_date] => 2019-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7444
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 22
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16523789
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/523789 | Chip assembly and method of manufacturing thereof | Jul 25, 2019 | Issued |
Array
(
[id] => 18001083
[patent_doc_number] => 11502194
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-15
[patent_title] => MOSFET manufacturing method
[patent_app_type] => utility
[patent_app_number] => 17/263207
[patent_app_country] => US
[patent_app_date] => 2019-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 4094
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 234
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17263207
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/263207 | MOSFET manufacturing method | Jul 24, 2019 | Issued |
Array
(
[id] => 14972045
[patent_doc_number] => 20190313501
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-10
[patent_title] => CARBON DOT LIGHT EMITTING DIODES
[patent_app_type] => utility
[patent_app_number] => 16/449619
[patent_app_country] => US
[patent_app_date] => 2019-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4113
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16449619
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/449619 | Carbon dot light emitting diodes | Jun 23, 2019 | Issued |
Array
(
[id] => 18032151
[patent_doc_number] => 11515351
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-29
[patent_title] => Semiconductor device and method of manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/252926
[patent_app_country] => US
[patent_app_date] => 2019-06-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 17264
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17252926
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/252926 | Semiconductor device and method of manufacturing semiconductor device | Jun 12, 2019 | Issued |
Array
(
[id] => 16594081
[patent_doc_number] => 10903358
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-01-26
[patent_title] => Vertical fin field effect transistor with reduced gate length variations
[patent_app_type] => utility
[patent_app_number] => 16/432478
[patent_app_country] => US
[patent_app_date] => 2019-06-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 22
[patent_no_of_words] => 8367
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16432478
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/432478 | Vertical fin field effect transistor with reduced gate length variations | Jun 4, 2019 | Issued |
Array
(
[id] => 15046167
[patent_doc_number] => 20190334088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-10-31
[patent_title] => METHOD OF MANUFACTURING ORGANIC LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING DISPLAY UNIT
[patent_app_type] => utility
[patent_app_number] => 16/431325
[patent_app_country] => US
[patent_app_date] => 2019-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 27002
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431325
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/431325 | Method of manufacturing organic light-emitting device and method of manufacturing display unit | Jun 3, 2019 | Issued |
Array
(
[id] => 17708972
[patent_doc_number] => 20220208980
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-06-30
[patent_title] => Field Effect Transistor and Method for Manufacturing the Same
[patent_app_type] => utility
[patent_app_number] => 17/612439
[patent_app_country] => US
[patent_app_date] => 2019-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6423
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17612439
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/612439 | Field effect transistor and method for manufacturing the same | Jun 3, 2019 | Issued |
Array
(
[id] => 16464195
[patent_doc_number] => 10847556
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-24
[patent_title] => Solid-state imaging apparatus and imaging apparatus
[patent_app_type] => utility
[patent_app_number] => 16/431277
[patent_app_country] => US
[patent_app_date] => 2019-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 26
[patent_figures_cnt] => 39
[patent_no_of_words] => 15155
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 337
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431277
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/431277 | Solid-state imaging apparatus and imaging apparatus | Jun 3, 2019 | Issued |
Array
(
[id] => 16433154
[patent_doc_number] => 10833254
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-11-10
[patent_title] => Engineered barrier layer interface for high speed spin-transfer torque magnetic random access memory
[patent_app_type] => utility
[patent_app_number] => 16/431490
[patent_app_country] => US
[patent_app_date] => 2019-06-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 14
[patent_no_of_words] => 8461
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431490
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/431490 | Engineered barrier layer interface for high speed spin-transfer torque magnetic random access memory | Jun 3, 2019 | Issued |
Array
(
[id] => 16896265
[patent_doc_number] => 11037827
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-06-15
[patent_title] => Asymmetric source/drain epitaxy
[patent_app_type] => utility
[patent_app_number] => 16/429657
[patent_app_country] => US
[patent_app_date] => 2019-06-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 31
[patent_no_of_words] => 11993
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16429657
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/429657 | Asymmetric source/drain epitaxy | Jun 2, 2019 | Issued |
Array
(
[id] => 16487779
[patent_doc_number] => 20200381388
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-12-03
[patent_title] => HEATED PINS TO COUPLE WITH SOLDER ELEMENTS
[patent_app_type] => utility
[patent_app_number] => 16/424227
[patent_app_country] => US
[patent_app_date] => 2019-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6541
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -22
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16424227
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/424227 | Heated pins to couple with solder elements | May 27, 2019 | Issued |
Array
(
[id] => 16502543
[patent_doc_number] => 10867941
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-12-15
[patent_title] => Semiconductor device and method
[patent_app_type] => utility
[patent_app_number] => 16/417057
[patent_app_country] => US
[patent_app_date] => 2019-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 10686
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16417057
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/417057 | Semiconductor device and method | May 19, 2019 | Issued |
Array
(
[id] => 14843133
[patent_doc_number] => 20190279967
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-09-12
[patent_title] => SEMICONDUCTOR DEVICE WITH AN ELECTRICALLY-COUPLED PROTECTION MECHANISM AND ASSOCIATED SYSTEMS, DEVICES, AND METHODS
[patent_app_type] => utility
[patent_app_number] => 16/416625
[patent_app_country] => US
[patent_app_date] => 2019-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8196
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16416625
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/416625 | Semiconductor device with an electrically-coupled protection mechanism and associated systems, devices, and methods | May 19, 2019 | Issued |