Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10517437 [patent_doc_number] => 09244483 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-01-26 [patent_title] => 'Excess-fours processing in direct digital synthesizer implementations' [patent_app_type] => utility [patent_app_number] => 13/205525 [patent_app_country] => US [patent_app_date] => 2011-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 33 [patent_no_of_words] => 26191 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13205525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/205525
Excess-fours processing in direct digital synthesizer implementations Aug 7, 2011 Issued
Array ( [id] => 8650566 [patent_doc_number] => 20130036296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'FLOATING POINT EXECUTION UNIT WITH FIXED POINT FUNCTIONALITY' [patent_app_type] => utility [patent_app_number] => 13/197894 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10053 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13197894 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197894
Floating point execution unit with fixed point functionality Aug 3, 2011 Issued
Array ( [id] => 9005855 [patent_doc_number] => 20130226980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'MULTIPURPOSE CALCULATION COMPUTING DEVICE' [patent_app_type] => utility [patent_app_number] => 13/813837 [patent_app_country] => US [patent_app_date] => 2011-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6205 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13813837 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/813837
MULTIPURPOSE CALCULATION COMPUTING DEVICE Aug 1, 2011
Array ( [id] => 8650416 [patent_doc_number] => 20130036146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'METHOD AND APPARATUS FOR HYBRID RING GENERATOR DESIGN' [patent_app_type] => utility [patent_app_number] => 13/195524 [patent_app_country] => US [patent_app_date] => 2011-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5746 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13195524 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/195524
Method and apparatus for hybrid ring generator design Jul 31, 2011 Issued
Array ( [id] => 9829247 [patent_doc_number] => 08938483 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-01-20 [patent_title] => 'Filter parallelization for high data throughput' [patent_app_type] => utility [patent_app_number] => 13/186868 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5975 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186868 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/186868
Filter parallelization for high data throughput Jul 19, 2011 Issued
Array ( [id] => 9878652 [patent_doc_number] => 08965946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Data processing apparatus and method for performing a reciprocal operation on an input value to produce a result value' [patent_app_type] => utility [patent_app_number] => 13/186135 [patent_app_country] => US [patent_app_date] => 2011-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9180 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 204 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13186135 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/186135
Data processing apparatus and method for performing a reciprocal operation on an input value to produce a result value Jul 18, 2011 Issued
Array ( [id] => 9443951 [patent_doc_number] => 08713082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-04-29 [patent_title] => 'Scalable architecture for rank order filtering' [patent_app_type] => utility [patent_app_number] => 13/180767 [patent_app_country] => US [patent_app_date] => 2011-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11720 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13180767 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/180767
Scalable architecture for rank order filtering Jul 11, 2011 Issued
Array ( [id] => 8588262 [patent_doc_number] => 20130007083 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'SYSTEMS AND METHODS FOR COMPUTING CONTINUOUS WAVELET TRANSFORM ON A DEDICATED INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/174354 [patent_app_country] => US [patent_app_date] => 2011-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10003 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13174354 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/174354
SYSTEMS AND METHODS FOR COMPUTING CONTINUOUS WAVELET TRANSFORM ON A DEDICATED INTEGRATED CIRCUIT Jun 29, 2011 Abandoned
Array ( [id] => 7695122 [patent_doc_number] => 20110231468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'HIGH-RADIX MULTIPLIER-DIVIDER' [patent_app_type] => utility [patent_app_number] => 13/151099 [patent_app_country] => US [patent_app_date] => 2011-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11896 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231468.pdf [firstpage_image] =>[orig_patent_app_number] => 13151099 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/151099
High-radix multiplier-divider May 31, 2011 Issued
Array ( [id] => 5940203 [patent_doc_number] => 20110214042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-01 [patent_title] => 'DETECTION OF POTENTIAL NEED TO USE A LARGER DATA FORMAT IN PERFORMING FLOATING POINT OPERATIONS' [patent_app_type] => utility [patent_app_number] => 13/103368 [patent_app_country] => US [patent_app_date] => 2011-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9508 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0214/20110214042.pdf [firstpage_image] =>[orig_patent_app_number] => 13103368 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/103368
Detection of potential need to use a larger data format in performing floating point operations May 8, 2011 Issued
Array ( [id] => 6052222 [patent_doc_number] => 20110208946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-25 [patent_title] => 'Dual Mode Floating Point Multiply Accumulate Unit' [patent_app_type] => utility [patent_app_number] => 13/101103 [patent_app_country] => US [patent_app_date] => 2011-05-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 23546 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20110208946.pdf [firstpage_image] =>[orig_patent_app_number] => 13101103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/101103
Dual Mode Floating Point Multiply Accumulate Unit May 3, 2011 Abandoned
Array ( [id] => 5960612 [patent_doc_number] => 20110184999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'Linear Transformation Circuit' [patent_app_type] => utility [patent_app_number] => 13/083473 [patent_app_country] => US [patent_app_date] => 2011-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11425 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20110184999.pdf [firstpage_image] =>[orig_patent_app_number] => 13083473 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/083473
Linear Transformation Circuit Apr 7, 2011 Abandoned
Array ( [id] => 7694897 [patent_doc_number] => 20110231693 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-22 [patent_title] => 'NUMERICALLY CONTROLLED OSCILLATOR AND OSCILLATION METHOD FOR GENERATING FUNCTION VALUES USING RECURRENCE EQUATION' [patent_app_type] => utility [patent_app_number] => 13/047560 [patent_app_country] => US [patent_app_date] => 2011-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9324 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20110231693.pdf [firstpage_image] =>[orig_patent_app_number] => 13047560 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/047560
Numerically controlled oscillator and oscillation method for generating function values using recurrence equation Mar 13, 2011 Issued
Array ( [id] => 9043858 [patent_doc_number] => 20130246496 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'FLOATING-POINT VECTOR NORMALISATION' [patent_app_type] => utility [patent_app_number] => 13/825179 [patent_app_country] => US [patent_app_date] => 2011-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6512 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 22 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13825179 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/825179
FLOATING-POINT VECTOR NORMALISATION Mar 13, 2011 Abandoned
Array ( [id] => 8310976 [patent_doc_number] => 20120187999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'INTERPOLATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/044566 [patent_app_country] => US [patent_app_date] => 2011-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3088 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13044566 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/044566
INTERPOLATION CIRCUIT Mar 9, 2011 Abandoned
Array ( [id] => 9611373 [patent_doc_number] => 08788562 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-07-22 [patent_title] => 'Large multiplier for programmable logic device' [patent_app_type] => utility [patent_app_number] => 13/042700 [patent_app_country] => US [patent_app_date] => 2011-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 4044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13042700 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/042700
Large multiplier for programmable logic device Mar 7, 2011 Issued
Array ( [id] => 10107406 [patent_doc_number] => 09143194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Low-rate sampling of pulse streams' [patent_app_type] => utility [patent_app_number] => 13/041455 [patent_app_country] => US [patent_app_date] => 2011-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 7100 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13041455 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/041455
Low-rate sampling of pulse streams Mar 6, 2011 Issued
Array ( [id] => 10901213 [patent_doc_number] => 08924455 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-12-30 [patent_title] => 'Multiplication of matrices using systolic arrays' [patent_app_type] => utility [patent_app_number] => 13/035600 [patent_app_country] => US [patent_app_date] => 2011-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 20 [patent_no_of_words] => 5855 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13035600 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/035600
Multiplication of matrices using systolic arrays Feb 24, 2011 Issued
Array ( [id] => 8837059 [patent_doc_number] => 08452828 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-05-28 [patent_title] => 'Method and apparatus for implementing finite impulse response filters without the use of multipliers' [patent_app_type] => utility [patent_app_number] => 13/032924 [patent_app_country] => US [patent_app_date] => 2011-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6107 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13032924 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/032924
Method and apparatus for implementing finite impulse response filters without the use of multipliers Feb 22, 2011 Issued
Array ( [id] => 8360671 [patent_doc_number] => 20120215825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'EFFICIENT MULTIPLICATION TECHNIQUES' [patent_app_type] => utility [patent_app_number] => 13/031697 [patent_app_country] => US [patent_app_date] => 2011-02-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3986 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13031697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/031697
EFFICIENT MULTIPLICATION TECHNIQUES Feb 21, 2011 Abandoned
Menu