Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8872807 [patent_doc_number] => 08468193 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-18 [patent_title] => 'Binary number multiplying method and circuit' [patent_app_type] => utility [patent_app_number] => 12/515709 [patent_app_country] => US [patent_app_date] => 2007-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 6731 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12515709 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/515709
Binary number multiplying method and circuit Mar 14, 2007 Issued
Array ( [id] => 5132395 [patent_doc_number] => 20070208792 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-06 [patent_title] => 'METHOD FOR COMPRESSING AND DECOMPRESSING A SEQUENCE OF NUMBERS' [patent_app_type] => utility [patent_app_number] => 11/685467 [patent_app_country] => US [patent_app_date] => 2007-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7233 [patent_no_of_claims] => 38 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0208/20070208792.pdf [firstpage_image] =>[orig_patent_app_number] => 11685467 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/685467
METHOD FOR COMPRESSING AND DECOMPRESSING A SEQUENCE OF NUMBERS Mar 12, 2007 Abandoned
Array ( [id] => 5232399 [patent_doc_number] => 20070294508 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-20 [patent_title] => 'Parallel pseudorandom number generation' [patent_app_type] => utility [patent_app_number] => 11/716379 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7587 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0294/20070294508.pdf [firstpage_image] =>[orig_patent_app_number] => 11716379 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/716379
Parallel pseudorandom number generation Mar 8, 2007 Issued
Array ( [id] => 4487311 [patent_doc_number] => 07908310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-03-15 [patent_title] => 'Multiplier-divider having error offset function' [patent_app_type] => utility [patent_app_number] => 11/714764 [patent_app_country] => US [patent_app_date] => 2007-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3414 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/908/07908310.pdf [firstpage_image] =>[orig_patent_app_number] => 11714764 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/714764
Multiplier-divider having error offset function Mar 6, 2007 Issued
Array ( [id] => 4585265 [patent_doc_number] => 07849126 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-12-07 [patent_title] => 'System and method for fast matrix factorization' [patent_app_type] => utility [patent_app_number] => 11/682799 [patent_app_country] => US [patent_app_date] => 2007-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1764 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/849/07849126.pdf [firstpage_image] =>[orig_patent_app_number] => 11682799 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/682799
System and method for fast matrix factorization Mar 5, 2007 Issued
Array ( [id] => 8678419 [patent_doc_number] => 08386553 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-02-26 [patent_title] => 'Large multiplier for programmable logic device' [patent_app_type] => utility [patent_app_number] => 11/682787 [patent_app_country] => US [patent_app_date] => 2007-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5738 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11682787 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/682787
Large multiplier for programmable logic device Mar 5, 2007 Issued
Array ( [id] => 5454358 [patent_doc_number] => 20090070395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-03-12 [patent_title] => 'INTERPOLATION FUNCTION GENERATION CIRCUIT' [patent_app_type] => utility [patent_app_number] => 12/281722 [patent_app_country] => US [patent_app_date] => 2007-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5341 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0070/20090070395.pdf [firstpage_image] =>[orig_patent_app_number] => 12281722 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/281722
INTERPOLATION FUNCTION GENERATION CIRCUIT Mar 4, 2007 Abandoned
Array ( [id] => 5294229 [patent_doc_number] => 20090009155 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'Discrete Time Direct Sampling Circuit and Receiver' [patent_app_type] => utility [patent_app_number] => 12/281668 [patent_app_country] => US [patent_app_date] => 2007-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 17249 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0009/20090009155.pdf [firstpage_image] =>[orig_patent_app_number] => 12281668 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/281668
Discrete time direct sampling circuit and receiver Mar 4, 2007 Issued
Array ( [id] => 9289098 [patent_doc_number] => 08645450 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-02-04 [patent_title] => 'Multiplier-accumulator circuitry and methods' [patent_app_type] => utility [patent_app_number] => 11/713434 [patent_app_country] => US [patent_app_date] => 2007-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2828 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11713434 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/713434
Multiplier-accumulator circuitry and methods Mar 1, 2007 Issued
Array ( [id] => 4626570 [patent_doc_number] => 08005881 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-08-23 [patent_title] => 'Scalable architecture for rank order filtering' [patent_app_type] => utility [patent_app_number] => 11/713261 [patent_app_country] => US [patent_app_date] => 2007-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11721 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 432 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/005/08005881.pdf [firstpage_image] =>[orig_patent_app_number] => 11713261 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/713261
Scalable architecture for rank order filtering Mar 1, 2007 Issued
Array ( [id] => 7690265 [patent_doc_number] => 20070233768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Method and circuit arrangement for computing a value of a complex signal' [patent_app_type] => utility [patent_app_number] => 11/712202 [patent_app_country] => US [patent_app_date] => 2007-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3656 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0233/20070233768.pdf [firstpage_image] =>[orig_patent_app_number] => 11712202 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/712202
Method and circuit arrangement for computing a value of a complex signal Feb 27, 2007 Abandoned
Array ( [id] => 5257326 [patent_doc_number] => 20070210958 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-13 [patent_title] => 'SYSTEMS AND METHODS FOR EXTRACTING COHERENT CORRELATION DATA' [patent_app_type] => utility [patent_app_number] => 11/679755 [patent_app_country] => US [patent_app_date] => 2007-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 15474 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0210/20070210958.pdf [firstpage_image] =>[orig_patent_app_number] => 11679755 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/679755
Systems and methods for extracting coherent correlation data Feb 26, 2007 Issued
Array ( [id] => 10138250 [patent_doc_number] => 09171571 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Read channel operable to calibrate a coefficient of a filter, such as an FIR filter, disposed before an interpolated-timing-recovery circuit, and related integrated circuit, system, and method' [patent_app_type] => utility [patent_app_number] => 11/711479 [patent_app_country] => US [patent_app_date] => 2007-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 4968 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11711479 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/711479
Read channel operable to calibrate a coefficient of a filter, such as an FIR filter, disposed before an interpolated-timing-recovery circuit, and related integrated circuit, system, and method Feb 25, 2007 Issued
Array ( [id] => 7517677 [patent_doc_number] => 08041758 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Multiplier and arithmetic unit' [patent_app_type] => utility [patent_app_number] => 11/709784 [patent_app_country] => US [patent_app_date] => 2007-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 10373 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/041/08041758.pdf [firstpage_image] =>[orig_patent_app_number] => 11709784 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/709784
Multiplier and arithmetic unit Feb 22, 2007 Issued
Array ( [id] => 4874661 [patent_doc_number] => 20080201395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-08-21 [patent_title] => 'METHOD AND APPARATUS FOR DISTRIBUTING RANDOM ELEMENTS' [patent_app_type] => utility [patent_app_number] => 11/676133 [patent_app_country] => US [patent_app_date] => 2007-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4044 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20080201395.pdf [firstpage_image] =>[orig_patent_app_number] => 11676133 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/676133
Method and apparatus for distributing random elements Feb 15, 2007 Issued
Array ( [id] => 5114705 [patent_doc_number] => 20070198621 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-23 [patent_title] => 'COMPRESSION SYSTEM AND METHOD FOR ACCELERATING SPARSE MATRIX COMPUTATIONS' [patent_app_type] => utility [patent_app_number] => 11/673944 [patent_app_country] => US [patent_app_date] => 2007-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 13448 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0198/20070198621.pdf [firstpage_image] =>[orig_patent_app_number] => 11673944 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/673944
Compression system and method for accelerating sparse matrix computations Feb 11, 2007 Issued
Array ( [id] => 5102691 [patent_doc_number] => 20070185953 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-08-09 [patent_title] => 'Dual Mode Floating Point Multiply Accumulate Unit' [patent_app_type] => utility [patent_app_number] => 11/671630 [patent_app_country] => US [patent_app_date] => 2007-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 43 [patent_no_of_words] => 23445 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20070185953.pdf [firstpage_image] =>[orig_patent_app_number] => 11671630 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/671630
Dual mode floating point multiply accumulate unit Feb 5, 2007 Issued
Array ( [id] => 7705752 [patent_doc_number] => 08090756 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-03 [patent_title] => 'Method and apparatus for generating trigonometric results' [patent_app_type] => utility [patent_app_number] => 11/668040 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5653 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/090/08090756.pdf [firstpage_image] =>[orig_patent_app_number] => 11668040 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668040
Method and apparatus for generating trigonometric results Jan 28, 2007 Issued
Array ( [id] => 4847377 [patent_doc_number] => 20080183785 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-31 [patent_title] => 'Differential Approach to Current-Mode Chaos Based Random Number Generator' [patent_app_type] => utility [patent_app_number] => 11/668130 [patent_app_country] => US [patent_app_date] => 2007-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3352 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0183/20080183785.pdf [firstpage_image] =>[orig_patent_app_number] => 11668130 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/668130
Differential approach to current-mode chaos based random number generator Jan 28, 2007 Issued
Array ( [id] => 5522647 [patent_doc_number] => 20090030628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-29 [patent_title] => 'SIGNAL ANALYSER' [patent_app_type] => utility [patent_app_number] => 12/162432 [patent_app_country] => US [patent_app_date] => 2007-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12435 [patent_no_of_claims] => 48 [patent_no_of_ind_claims] => 32 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20090030628.pdf [firstpage_image] =>[orig_patent_app_number] => 12162432 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/162432
SIGNAL ANALYSER Jan 25, 2007 Abandoned
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