Search

Chuong D. Ngo

Examiner (ID: 18506)

Most Active Art Unit
2193
Art Unit(s)
2124, 2121, 2306, 2183, 2182, 2193, 2787, 2899
Total Applications
2158
Issued Applications
1753
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16895271 [patent_doc_number] => 11036825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Computer architecture for maintaining a distance metric across correlithm objects in a correlithm object processing system [patent_app_type] => utility [patent_app_number] => 16/298111 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 21748 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298111 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298111
Computer architecture for maintaining a distance metric across correlithm objects in a correlithm object processing system Mar 10, 2019 Issued
Array ( [id] => 16818903 [patent_doc_number] => 11003735 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Computer architecture for emulating recording and playback in a correlithm object processing system [patent_app_type] => utility [patent_app_number] => 16/298070 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 29576 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298070 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298070
Computer architecture for emulating recording and playback in a correlithm object processing system Mar 10, 2019 Issued
Array ( [id] => 16314858 [patent_doc_number] => 20200293596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => COMPUTER ARCHITECTURE FOR EMULATING A STRING CORRELITHM OBJECT VELOCITY DETECTOR IN A CORRELITHM OBJECT PROCESSING SYSTEM [patent_app_type] => utility [patent_app_number] => 16/297959 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 29577 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16297959 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/297959
Computer architecture for emulating a string correlithm object velocity detector in a correlithm object processing system Mar 10, 2019 Issued
Array ( [id] => 16895272 [patent_doc_number] => 11036826 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Computer architecture for emulating a correlithm object processing system with transparency [patent_app_type] => utility [patent_app_number] => 16/298266 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 21743 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 354 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298266 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298266
Computer architecture for emulating a correlithm object processing system with transparency Mar 10, 2019 Issued
Array ( [id] => 17001553 [patent_doc_number] => 11080364 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Computer architecture for performing error detection and correction using demultiplexers and multiplexers in a correlithm object processing system [patent_app_type] => utility [patent_app_number] => 16/298452 [patent_app_country] => US [patent_app_date] => 2019-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 21758 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 258 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16298452 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/298452
Computer architecture for performing error detection and correction using demultiplexers and multiplexers in a correlithm object processing system Mar 10, 2019 Issued
Array ( [id] => 14840855 [patent_doc_number] => 20190278828 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-12 [patent_title] => ELECTRONIC APPARATUS AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 16/295599 [patent_app_country] => US [patent_app_date] => 2019-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18258 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16295599 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/295599
Electronic apparatus and control method thereof Mar 6, 2019 Issued
Array ( [id] => 16942825 [patent_doc_number] => 11055064 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-07-06 [patent_title] => Testing of physical random number generators [patent_app_type] => utility [patent_app_number] => 16/268530 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 9720 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16268530 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/268530
Testing of physical random number generators Feb 5, 2019 Issued
Array ( [id] => 16737567 [patent_doc_number] => 10963219 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-30 [patent_title] => Hybrid floating point representation for deep learning acceleration [patent_app_type] => utility [patent_app_number] => 16/269346 [patent_app_country] => US [patent_app_date] => 2019-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9265 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16269346 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/269346
Hybrid floating point representation for deep learning acceleration Feb 5, 2019 Issued
Array ( [id] => 17252813 [patent_doc_number] => 11188302 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-11-30 [patent_title] => Top value computation on an integrated circuit device [patent_app_type] => utility [patent_app_number] => 16/267031 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 21105 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16267031 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/267031
Top value computation on an integrated circuit device Feb 3, 2019 Issued
Array ( [id] => 14379165 [patent_doc_number] => 20190163495 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-30 [patent_title] => ARITHMETIC LOGIC UNIT [patent_app_type] => utility [patent_app_number] => 16/263458 [patent_app_country] => US [patent_app_date] => 2019-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7566 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16263458 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/263458
Arithmetic logic unit Jan 30, 2019 Issued
Array ( [id] => 14657967 [patent_doc_number] => 20190236112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-01 [patent_title] => High-Speed Multi-Input Tracker Based on In-Memory Operations of Time-Dependent Data [patent_app_type] => utility [patent_app_number] => 16/258349 [patent_app_country] => US [patent_app_date] => 2019-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7964 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16258349 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/258349
High-speed multi-input tracker based on in-memory operations of time-dependent data Jan 24, 2019 Issued
Array ( [id] => 16193071 [patent_doc_number] => 20200233920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-23 [patent_title] => MODELLING ORDINARY DIFFERENTIAL EQUATIONS USING A VARIATIONAL AUTO ENCODER [patent_app_type] => utility [patent_app_number] => 16/255778 [patent_app_country] => US [patent_app_date] => 2019-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17953 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16255778 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/255778
Modelling ordinary differential equations using a variational auto encoder Jan 22, 2019 Issued
Array ( [id] => 16592820 [patent_doc_number] => 10902085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-01-26 [patent_title] => Solving mixed integer optimization problems on a hybrid classical-quantum computing system [patent_app_type] => utility [patent_app_number] => 16/248278 [patent_app_country] => US [patent_app_date] => 2019-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8499 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16248278 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/248278
Solving mixed integer optimization problems on a hybrid classical-quantum computing system Jan 14, 2019 Issued
Array ( [id] => 14692811 [patent_doc_number] => 20190245521 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-08 [patent_title] => DIGITAL FILTERING METHOD, CORRESPONDING CIRCUIT AND DEVICE [patent_app_type] => utility [patent_app_number] => 16/240915 [patent_app_country] => US [patent_app_date] => 2019-01-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16240915 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/240915
Digital filtering method, corresponding circuit and device Jan 6, 2019 Issued
Array ( [id] => 14282569 [patent_doc_number] => 20190138569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-05-09 [patent_title] => DISTRIBUTED MATRIX MULTIPLICATION FOR NEURAL NETWORKS [patent_app_type] => utility [patent_app_number] => 16/236955 [patent_app_country] => US [patent_app_date] => 2018-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16794 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16236955 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/236955
Distributed matrix multiplication for neural networks Dec 30, 2018 Issued
Array ( [id] => 16644221 [patent_doc_number] => 10922077 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Apparatuses, methods, and systems for stencil configuration and computation instructions [patent_app_type] => utility [patent_app_number] => 16/236463 [patent_app_country] => US [patent_app_date] => 2018-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 39 [patent_figures_cnt] => 48 [patent_no_of_words] => 28670 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16236463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/236463
Apparatuses, methods, and systems for stencil configuration and computation instructions Dec 28, 2018 Issued
Array ( [id] => 15997763 [patent_doc_number] => 20200174752 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => TRUE RANDOM NUMBER GENERATOR [patent_app_type] => utility [patent_app_number] => 16/233827 [patent_app_country] => US [patent_app_date] => 2018-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3650 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 250 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16233827 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/233827
True random number generator Dec 26, 2018 Issued
Array ( [id] => 16448956 [patent_doc_number] => 10840891 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-17 [patent_title] => Low power digital interpolation/decimation apparatus and method [patent_app_type] => utility [patent_app_number] => 16/231936 [patent_app_country] => US [patent_app_date] => 2018-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 12 [patent_no_of_words] => 8841 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16231936 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/231936
Low power digital interpolation/decimation apparatus and method Dec 23, 2018 Issued
Array ( [id] => 17469594 [patent_doc_number] => 11276073 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-15 [patent_title] => Methods and apparatus to reduce computer-generated errors in computer-generated audience measurement data [patent_app_type] => utility [patent_app_number] => 16/224322 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 18187 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 325 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16224322 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/224322
Methods and apparatus to reduce computer-generated errors in computer-generated audience measurement data Dec 17, 2018 Issued
Array ( [id] => 17667045 [patent_doc_number] => 11360741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-06-14 [patent_title] => Arithmetic circuit [patent_app_type] => utility [patent_app_number] => 16/959968 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 12422 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16959968 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/959968
Arithmetic circuit Dec 17, 2018 Issued
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