Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15886785 [patent_doc_number] => 10649737 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Reverse conversion apparatus for residue numbers [patent_app_type] => utility [patent_app_number] => 16/216326 [patent_app_country] => US [patent_app_date] => 2018-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 60 [patent_no_of_words] => 43097 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16216326 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/216326
Reverse conversion apparatus for residue numbers Dec 10, 2018 Issued
Array ( [id] => 17223445 [patent_doc_number] => 11175946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-16 [patent_title] => Pipelined matrix multiplication at a graphics processing unit [patent_app_type] => utility [patent_app_number] => 16/211954 [patent_app_country] => US [patent_app_date] => 2018-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3606 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16211954 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/211954
Pipelined matrix multiplication at a graphics processing unit Dec 5, 2018 Issued
Array ( [id] => 17977760 [patent_doc_number] => 11494623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-08 [patent_title] => Processing element and operating method thereof in neural network [patent_app_type] => utility [patent_app_number] => 16/206687 [patent_app_country] => US [patent_app_date] => 2018-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5293 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16206687 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/206687
Processing element and operating method thereof in neural network Nov 29, 2018 Issued
Array ( [id] => 14188867 [patent_doc_number] => 20190114139 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-04-18 [patent_title] => Configurable Processor with Backside Look-Up Table [patent_app_type] => utility [patent_app_number] => 16/203602 [patent_app_country] => US [patent_app_date] => 2018-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5981 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16203602 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/203602
Configurable Processor with Backside Look-Up Table Nov 27, 2018 Abandoned
Array ( [id] => 16248480 [patent_doc_number] => 10747842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Optimizing linear programming models using different solvers [patent_app_type] => utility [patent_app_number] => 16/201932 [patent_app_country] => US [patent_app_date] => 2018-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10625 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16201932 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/201932
Optimizing linear programming models using different solvers Nov 26, 2018 Issued
Array ( [id] => 17187188 [patent_doc_number] => 20210334073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => High-Speed Random Number Generation Method and Device [patent_app_type] => utility [patent_app_number] => 16/486241 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -2 [patent_words_short_claim] => 286 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16486241 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/486241
High-speed random number generation method and device Nov 25, 2018 Issued
Array ( [id] => 16248175 [patent_doc_number] => 10747534 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-08-18 [patent_title] => Vectorization of wide integer data paths into parallel operations with value extraction for maintaining valid guard bands [patent_app_type] => utility [patent_app_number] => 16/200336 [patent_app_country] => US [patent_app_date] => 2018-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8243 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16200336 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/200336
Vectorization of wide integer data paths into parallel operations with value extraction for maintaining valid guard bands Nov 25, 2018 Issued
Array ( [id] => 15904151 [patent_doc_number] => 20200151596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => ENTITY RECOGNITION SYSTEM BASED ON INTERACTION VECTORIZATION [patent_app_type] => utility [patent_app_number] => 16/190938 [patent_app_country] => US [patent_app_date] => 2018-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9166 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16190938 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/190938
Entity recognition system based on interaction vectorization Nov 13, 2018 Issued
Array ( [id] => 16636984 [patent_doc_number] => 10915494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-02-09 [patent_title] => Approximation of mathematical functions in a vector processor [patent_app_type] => utility [patent_app_number] => 16/186546 [patent_app_country] => US [patent_app_date] => 2018-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6522 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16186546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/186546
Approximation of mathematical functions in a vector processor Nov 10, 2018 Issued
Array ( [id] => 15886783 [patent_doc_number] => 10649736 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-05-12 [patent_title] => Normalization unit for signed operands [patent_app_type] => utility [patent_app_number] => 16/185609 [patent_app_country] => US [patent_app_date] => 2018-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 60 [patent_no_of_words] => 43110 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16185609 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/185609
Normalization unit for signed operands Nov 8, 2018 Issued
Array ( [id] => 15902813 [patent_doc_number] => 20200150926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => DOT PRODUCT CALCULATORS AND METHODS OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/184985 [patent_app_country] => US [patent_app_date] => 2018-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13230 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16184985 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/184985
Dot product calculators and methods of operating the same Nov 7, 2018 Issued
Array ( [id] => 16299966 [patent_doc_number] => 20200285689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => COMMAND VALUE INTERPOLATION APPARATUS AND SERVO DRIVER [patent_app_type] => utility [patent_app_number] => 16/644526 [patent_app_country] => US [patent_app_date] => 2018-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7473 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16644526 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/644526
Command value interpolation apparatus and servo driver Nov 1, 2018 Issued
Array ( [id] => 15757605 [patent_doc_number] => 10620914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-14 [patent_title] => Method and system for performing division/multiplication operations in digital processors, corresponding device and computer program product [patent_app_type] => utility [patent_app_number] => 16/166977 [patent_app_country] => US [patent_app_date] => 2018-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6772 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16166977 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/166977
Method and system for performing division/multiplication operations in digital processors, corresponding device and computer program product Oct 21, 2018 Issued
Array ( [id] => 16416796 [patent_doc_number] => 10824692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Low-power adder circuit [patent_app_type] => utility [patent_app_number] => 16/159450 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9534 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159450 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/159450
Low-power adder circuit Oct 11, 2018 Issued
Array ( [id] => 15670341 [patent_doc_number] => 10599398 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Residue number matrix multiplier [patent_app_type] => utility [patent_app_number] => 16/159521 [patent_app_country] => US [patent_app_date] => 2018-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 58 [patent_figures_cnt] => 58 [patent_no_of_words] => 43115 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16159521 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/159521
Residue number matrix multiplier Oct 11, 2018 Issued
Array ( [id] => 15743381 [patent_doc_number] => 20200110579 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => ARGMAX FUNCTION ANALOG CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/153232 [patent_app_country] => US [patent_app_date] => 2018-10-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5803 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16153232 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/153232
ARGMAX FUNCTION ANALOG CIRCUIT Oct 4, 2018 Abandoned
Array ( [id] => 16535152 [patent_doc_number] => 10877752 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-29 [patent_title] => Techniques for current-sensing circuit design for compute-in-memory [patent_app_type] => utility [patent_app_number] => 16/146430 [patent_app_country] => US [patent_app_date] => 2018-09-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 10922 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16146430 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/146430
Techniques for current-sensing circuit design for compute-in-memory Sep 27, 2018 Issued
Array ( [id] => 13905973 [patent_doc_number] => 20190042191 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-07 [patent_title] => REDUCED FLOATING-POINT PRECISION ARITHMETIC CIRCUITRY [patent_app_type] => utility [patent_app_number] => 16/143234 [patent_app_country] => US [patent_app_date] => 2018-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8014 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16143234 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/143234
Reduced floating-point precision arithmetic circuitry Sep 25, 2018 Issued
Array ( [id] => 13797217 [patent_doc_number] => 20190012147 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-01-10 [patent_title] => RANDOM NUMBER GENERATION AND ACQUISITION METHOD AND DEVICE [patent_app_type] => utility [patent_app_number] => 16/131352 [patent_app_country] => US [patent_app_date] => 2018-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10299 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16131352 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/131352
Random number generation and acquisition method and device Sep 13, 2018 Issued
Array ( [id] => 16248142 [patent_doc_number] => 10747501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Providing efficient floating-point operations using matrix processors in processor-based systems [patent_app_type] => utility [patent_app_number] => 16/118099 [patent_app_country] => US [patent_app_date] => 2018-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5697 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16118099 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/118099
Providing efficient floating-point operations using matrix processors in processor-based systems Aug 29, 2018 Issued
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