Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 254322 [patent_doc_number] => 07580965 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-08-25 [patent_title] => 'Discrete-time convolution cycle reduction with programmable digital signal processor' [patent_app_type] => utility [patent_app_number] => 10/256588 [patent_app_country] => US [patent_app_date] => 2002-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3262 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/580/07580965.pdf [firstpage_image] =>[orig_patent_app_number] => 10256588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/256588
Discrete-time convolution cycle reduction with programmable digital signal processor Sep 26, 2002 Issued
Array ( [id] => 789275 [patent_doc_number] => 06988118 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Systolic product-sum calculator over multi-basis in GF(2m)' [patent_app_type] => utility [patent_app_number] => 10/254319 [patent_app_country] => US [patent_app_date] => 2002-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2431 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/988/06988118.pdf [firstpage_image] =>[orig_patent_app_number] => 10254319 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/254319
Systolic product-sum calculator over multi-basis in GF(2m) Sep 23, 2002 Issued
Array ( [id] => 7359801 [patent_doc_number] => 20040049525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-11 [patent_title] => 'Feedback random number generation method and system' [patent_app_type] => new [patent_app_number] => 10/236178 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2644 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0049/20040049525.pdf [firstpage_image] =>[orig_patent_app_number] => 10236178 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/236178
Feedback random number generation method and system Sep 5, 2002 Abandoned
Array ( [id] => 658992 [patent_doc_number] => 07111029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-19 [patent_title] => 'Random number generating circuit' [patent_app_type] => utility [patent_app_number] => 10/235827 [patent_app_country] => US [patent_app_date] => 2002-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 23 [patent_no_of_words] => 6239 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/111/07111029.pdf [firstpage_image] =>[orig_patent_app_number] => 10235827 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/235827
Random number generating circuit Sep 5, 2002 Issued
Array ( [id] => 6779861 [patent_doc_number] => 20030050943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Random number generating method and random number generating device' [patent_app_type] => new [patent_app_number] => 10/234337 [patent_app_country] => US [patent_app_date] => 2002-09-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6615 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20030050943.pdf [firstpage_image] =>[orig_patent_app_number] => 10234337 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/234337
Random number generating method and random number generating device Sep 4, 2002 Issued
Array ( [id] => 694906 [patent_doc_number] => 07076513 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-11 [patent_title] => 'Method and architecture for controlling asymmetry of an LMS adaptation algorithm that controls FIR filter coefficients' [patent_app_type] => utility [patent_app_number] => 10/230041 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 5708 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/076/07076513.pdf [firstpage_image] =>[orig_patent_app_number] => 10230041 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/230041
Method and architecture for controlling asymmetry of an LMS adaptation algorithm that controls FIR filter coefficients Aug 27, 2002 Issued
Array ( [id] => 7137999 [patent_doc_number] => 20040044710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-04 [patent_title] => 'Converting mathematical functions to power series' [patent_app_type] => new [patent_app_number] => 10/229448 [patent_app_country] => US [patent_app_date] => 2002-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2699 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20040044710.pdf [firstpage_image] =>[orig_patent_app_number] => 10229448 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/229448
Converting mathematical functions to power series Aug 27, 2002 Abandoned
Array ( [id] => 785831 [patent_doc_number] => 06993544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-31 [patent_title] => 'Limit-cycle oscillation suppression method, system, and computer program product' [patent_app_type] => utility [patent_app_number] => 10/228198 [patent_app_country] => US [patent_app_date] => 2002-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 11151 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/993/06993544.pdf [firstpage_image] =>[orig_patent_app_number] => 10228198 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/228198
Limit-cycle oscillation suppression method, system, and computer program product Aug 26, 2002 Issued
Array ( [id] => 685317 [patent_doc_number] => 07082452 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-25 [patent_title] => 'Galois field multiply/multiply-add/multiply accumulate' [patent_app_type] => utility [patent_app_number] => 10/228526 [patent_app_country] => US [patent_app_date] => 2002-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4419 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/082/07082452.pdf [firstpage_image] =>[orig_patent_app_number] => 10228526 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/228526
Galois field multiply/multiply-add/multiply accumulate Aug 25, 2002 Issued
Array ( [id] => 546825 [patent_doc_number] => 07185037 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-27 [patent_title] => 'Video block transform' [patent_app_type] => utility [patent_app_number] => 10/225749 [patent_app_country] => US [patent_app_date] => 2002-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 4377 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/185/07185037.pdf [firstpage_image] =>[orig_patent_app_number] => 10225749 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/225749
Video block transform Aug 21, 2002 Issued
Array ( [id] => 6779862 [patent_doc_number] => 20030050944 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-13 [patent_title] => 'Device for computing discrete transforms' [patent_app_type] => new [patent_app_number] => 10/222237 [patent_app_country] => US [patent_app_date] => 2002-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3648 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0050/20030050944.pdf [firstpage_image] =>[orig_patent_app_number] => 10222237 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/222237
Device for computing discrete transforms Aug 15, 2002 Abandoned
Array ( [id] => 7315931 [patent_doc_number] => 20040034675 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-02-19 [patent_title] => 'Flipping algorithm to architectures of hardware realization for lifting-based DWT' [patent_app_type] => new [patent_app_number] => 10/219309 [patent_app_country] => US [patent_app_date] => 2002-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3984 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20040034675.pdf [firstpage_image] =>[orig_patent_app_number] => 10219309 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/219309
Flipping algorithm to architectures of hardware realization for lifting-based DWT Aug 15, 2002 Issued
Array ( [id] => 7621213 [patent_doc_number] => 06978288 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-12-20 [patent_title] => 'Coefficient update unit' [patent_app_type] => utility [patent_app_number] => 10/215117 [patent_app_country] => US [patent_app_date] => 2002-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2495 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/978/06978288.pdf [firstpage_image] =>[orig_patent_app_number] => 10215117 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/215117
Coefficient update unit Aug 7, 2002 Issued
Array ( [id] => 7602042 [patent_doc_number] => 07237000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-26 [patent_title] => 'Speed of execution of a conditional subtract instruction and increasing the range of operands over which the instruction would be performed correctly' [patent_app_type] => utility [patent_app_number] => 10/202151 [patent_app_country] => US [patent_app_date] => 2002-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 5074 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/237/07237000.pdf [firstpage_image] =>[orig_patent_app_number] => 10202151 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/202151
Speed of execution of a conditional subtract instruction and increasing the range of operands over which the instruction would be performed correctly Jul 23, 2002 Issued
Array ( [id] => 6837484 [patent_doc_number] => 20030034824 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Shifting an operand left or right while minimizing the number of multiplexor stages' [patent_app_type] => new [patent_app_number] => 10/196581 [patent_app_country] => US [patent_app_date] => 2002-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5445 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034824.pdf [firstpage_image] =>[orig_patent_app_number] => 10196581 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/196581
Shifting an operand left or right while minimizing the number of multiplexor stages Jul 16, 2002 Issued
Array ( [id] => 7455869 [patent_doc_number] => 20040010531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-15 [patent_title] => 'Apparatus and method for calculating an exponential calculating result of a floating-point number' [patent_app_type] => new [patent_app_number] => 10/191168 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20040010531.pdf [firstpage_image] =>[orig_patent_app_number] => 10191168 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/191168
Apparatus and method for calculating an exponential calculating result of a floating-point number Jul 8, 2002 Issued
Array ( [id] => 6461647 [patent_doc_number] => 20020178431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Configurable logic block with and gate for efficient multiplication in FPGAS' [patent_app_type] => new [patent_app_number] => 10/192354 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5250 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178431.pdf [firstpage_image] =>[orig_patent_app_number] => 10192354 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/192354
Configurable logic block with and gate for efficient multiplication in FPGAS Jul 8, 2002 Issued
Array ( [id] => 947571 [patent_doc_number] => 06965906 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-11-15 [patent_title] => 'Converting negative floating point numbers to integer notation without two\'s complement hardware' [patent_app_type] => utility [patent_app_number] => 10/186793 [patent_app_country] => US [patent_app_date] => 2002-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 7193 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/965/06965906.pdf [firstpage_image] =>[orig_patent_app_number] => 10186793 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/186793
Converting negative floating point numbers to integer notation without two's complement hardware Jun 30, 2002 Issued
Array ( [id] => 7426751 [patent_doc_number] => 20040001505 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-01 [patent_title] => 'Circuit for adding one to a binary number' [patent_app_type] => new [patent_app_number] => 10/185158 [patent_app_country] => US [patent_app_date] => 2002-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9757 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20040001505.pdf [firstpage_image] =>[orig_patent_app_number] => 10185158 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185158
Circuit for adding one to a binary number Jun 26, 2002 Abandoned
Array ( [id] => 7443312 [patent_doc_number] => 20040003017 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-01-01 [patent_title] => 'Method for performing complex number multiplication and fast fourier' [patent_app_type] => new [patent_app_number] => 10/185199 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2474 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20040003017.pdf [firstpage_image] =>[orig_patent_app_number] => 10185199 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/185199
Method for performing complex number multiplication and fast fourier Jun 25, 2002 Abandoned
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