Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 704708 [patent_doc_number] => 07069289 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-06-27 [patent_title] => 'Floating point unit for detecting and representing inexact computations without flags or traps' [patent_app_type] => utility [patent_app_number] => 10/035589 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7120 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/069/07069289.pdf [firstpage_image] =>[orig_patent_app_number] => 10035589 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/035589
Floating point unit for detecting and representing inexact computations without flags or traps Dec 27, 2001 Issued
Array ( [id] => 789272 [patent_doc_number] => 06988117 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-01-17 [patent_title] => 'Bit-reversed indexing in a modified harvard DSP architecture' [patent_app_type] => utility [patent_app_number] => 10/028938 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2362 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/988/06988117.pdf [firstpage_image] =>[orig_patent_app_number] => 10028938 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/028938
Bit-reversed indexing in a modified harvard DSP architecture Dec 27, 2001 Issued
Array ( [id] => 6781480 [patent_doc_number] => 20030062927 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Programmable delay indexed data path register file for array processing' [patent_app_type] => new [patent_app_number] => 10/026258 [patent_app_country] => US [patent_app_date] => 2001-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4179 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062927.pdf [firstpage_image] =>[orig_patent_app_number] => 10026258 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/026258
Programmable delay indexed data path register file for array processing Dec 20, 2001 Issued
Array ( [id] => 6133481 [patent_doc_number] => 20020078109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-20 [patent_title] => 'Shift and detecting circuit and floating-point calculating circuit using the same' [patent_app_type] => new [patent_app_number] => 10/014379 [patent_app_country] => US [patent_app_date] => 2001-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 20202 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0078/20020078109.pdf [firstpage_image] =>[orig_patent_app_number] => 10014379 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/014379
Shift and detecting circuit and floating-point calculating circuit using the same Dec 13, 2001 Abandoned
Array ( [id] => 1055699 [patent_doc_number] => 06859813 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-02-22 [patent_title] => 'Parallel decimation circuits' [patent_app_type] => utility [patent_app_number] => 10/013568 [patent_app_country] => US [patent_app_date] => 2001-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4084 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/859/06859813.pdf [firstpage_image] =>[orig_patent_app_number] => 10013568 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/013568
Parallel decimation circuits Dec 10, 2001 Issued
Array ( [id] => 6698004 [patent_doc_number] => 20030110198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-12 [patent_title] => 'Three input variable subfield comparation for fast matching' [patent_app_type] => new [patent_app_number] => 10/014098 [patent_app_country] => US [patent_app_date] => 2001-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5922 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20030110198.pdf [firstpage_image] =>[orig_patent_app_number] => 10014098 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/014098
Three input variable subfield comparation for fast matching Dec 9, 2001 Issued
Array ( [id] => 690394 [patent_doc_number] => 07080114 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-07-18 [patent_title] => 'High speed scaleable multiplier' [patent_app_type] => utility [patent_app_number] => 10/004958 [patent_app_country] => US [patent_app_date] => 2001-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2944 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/080/07080114.pdf [firstpage_image] =>[orig_patent_app_number] => 10004958 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/004958
High speed scaleable multiplier Dec 3, 2001 Issued
Array ( [id] => 6369655 [patent_doc_number] => 20020118219 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Quantized nonlinear scaler' [patent_app_type] => new [patent_app_number] => 09/998829 [patent_app_country] => US [patent_app_date] => 2001-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6023 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0118/20020118219.pdf [firstpage_image] =>[orig_patent_app_number] => 09998829 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998829
Quantized nonlinear scaler Dec 2, 2001 Issued
Array ( [id] => 6654849 [patent_doc_number] => 20030105786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-06-05 [patent_title] => 'Method and apparatus for quantifying the number of identical consecutive digits within a string' [patent_app_type] => new [patent_app_number] => 09/996229 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3256 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20030105786.pdf [firstpage_image] =>[orig_patent_app_number] => 09996229 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/996229
Method and apparatus for quantifying the number of identical consecutive digits within a string Nov 29, 2001 Abandoned
Array ( [id] => 957969 [patent_doc_number] => 06957239 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-18 [patent_title] => 'System and method for generating waveforms using waveform segment queues' [patent_app_type] => utility [patent_app_number] => 09/998759 [patent_app_country] => US [patent_app_date] => 2001-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9842 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/957/06957239.pdf [firstpage_image] =>[orig_patent_app_number] => 09998759 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/998759
System and method for generating waveforms using waveform segment queues Nov 29, 2001 Issued
Array ( [id] => 752616 [patent_doc_number] => 07028069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-04-11 [patent_title] => 'Dynamic circuit using exclusive states' [patent_app_type] => utility [patent_app_number] => 09/996865 [patent_app_country] => US [patent_app_date] => 2001-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1878 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 222 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/028/07028069.pdf [firstpage_image] =>[orig_patent_app_number] => 09996865 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/996865
Dynamic circuit using exclusive states Nov 26, 2001 Issued
Array ( [id] => 6577922 [patent_doc_number] => 20020165886 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-07 [patent_title] => 'Modification to reconfigurable functional unit in a reconfigurable chip to perform linear feedback shift register function' [patent_app_type] => new [patent_app_number] => 09/989529 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 2318 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0165/20020165886.pdf [firstpage_image] =>[orig_patent_app_number] => 09989529 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/989529
Modification to reconfigurable functional unit in a reconfigurable chip to perform linear feedback shift register function Nov 20, 2001 Issued
Array ( [id] => 6802226 [patent_doc_number] => 20030097391 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-22 [patent_title] => 'Methods and apparatus for performing parallel integer multiply accumulate operations' [patent_app_type] => new [patent_app_number] => 09/991628 [patent_app_country] => US [patent_app_date] => 2001-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5892 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0097/20030097391.pdf [firstpage_image] =>[orig_patent_app_number] => 09991628 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/991628
Methods and apparatus for performing parallel integer multiply accumulate operations Nov 20, 2001 Issued
Array ( [id] => 1024691 [patent_doc_number] => 06889235 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-03 [patent_title] => 'Method and apparatus for quantifying the number of identical consecutive digits within a string' [patent_app_type] => utility [patent_app_number] => 09/991098 [patent_app_country] => US [patent_app_date] => 2001-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3183 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/889/06889235.pdf [firstpage_image] =>[orig_patent_app_number] => 09991098 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/991098
Method and apparatus for quantifying the number of identical consecutive digits within a string Nov 15, 2001 Issued
Array ( [id] => 6368184 [patent_doc_number] => 20020059354 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-16 [patent_title] => 'Circuit and method for generating fixed point data with reduced circuit scale' [patent_app_type] => new [patent_app_number] => 09/986748 [patent_app_country] => US [patent_app_date] => 2001-11-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5623 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0059/20020059354.pdf [firstpage_image] =>[orig_patent_app_number] => 09986748 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/986748
Circuit and method for generating fixed point data with reduced circuit scale Nov 8, 2001 Issued
Array ( [id] => 5791031 [patent_doc_number] => 20020161812 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-31 [patent_title] => 'Computer product and method for sparse matrices' [patent_app_type] => new [patent_app_number] => 10/055406 [patent_app_country] => US [patent_app_date] => 2001-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6432 [patent_no_of_claims] => 138 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0161/20020161812.pdf [firstpage_image] =>[orig_patent_app_number] => 10055406 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/055406
Computer product and method for sparse matrices Nov 6, 2001 Abandoned
Array ( [id] => 7455311 [patent_doc_number] => 20040052222 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-03-18 [patent_title] => 'Method of updating a shift register' [patent_app_type] => new [patent_app_number] => 10/416638 [patent_app_country] => US [patent_app_date] => 2003-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4375 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0052/20040052222.pdf [firstpage_image] =>[orig_patent_app_number] => 10416638 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/416638
Method of updating a shift register Oct 30, 2001 Issued
Array ( [id] => 7212398 [patent_doc_number] => 20040071207 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-04-15 [patent_title] => 'Adaptive filter' [patent_app_type] => new [patent_app_number] => 10/399848 [patent_app_country] => US [patent_app_date] => 2003-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 18798 [patent_no_of_claims] => 42 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0071/20040071207.pdf [firstpage_image] =>[orig_patent_app_number] => 10399848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/399848
Adaptive filter Oct 24, 2001 Issued
Array ( [id] => 6717225 [patent_doc_number] => 20030028573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-06 [patent_title] => 'Method for determining the square root of a long-bit number using a short-bit processor' [patent_app_type] => new [patent_app_number] => 09/981729 [patent_app_country] => US [patent_app_date] => 2001-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1650 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0028/20030028573.pdf [firstpage_image] =>[orig_patent_app_number] => 09981729 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/981729
Method for determining the square root of a long-bit number using a short-bit processor Oct 18, 2001 Issued
Array ( [id] => 1399970 [patent_doc_number] => 06564237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-05-13 [patent_title] => 'Arithmetic unit and data processing unit' [patent_app_type] => B2 [patent_app_number] => 09/978204 [patent_app_country] => US [patent_app_date] => 2001-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15808 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 358 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/564/06564237.pdf [firstpage_image] =>[orig_patent_app_number] => 09978204 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/978204
Arithmetic unit and data processing unit Oct 16, 2001 Issued
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