Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1417996 [patent_doc_number] => 06546409 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-08 [patent_title] => 'Digital processing' [patent_app_type] => B1 [patent_app_number] => 09/328519 [patent_app_country] => US [patent_app_date] => 1999-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1569 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/546/06546409.pdf [firstpage_image] =>[orig_patent_app_number] => 09328519 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328519
Digital processing Jun 8, 1999 Issued
Array ( [id] => 1480638 [patent_doc_number] => 06389443 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method and apparatus for an efficient square-root computation' [patent_app_type] => B1 [patent_app_number] => 09/326290 [patent_app_country] => US [patent_app_date] => 1999-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2176 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389443.pdf [firstpage_image] =>[orig_patent_app_number] => 09326290 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/326290
Method and apparatus for an efficient square-root computation Jun 6, 1999 Issued
Array ( [id] => 1524718 [patent_doc_number] => 06415309 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Method of and apparatus for generating random numbers' [patent_app_type] => B1 [patent_app_number] => 09/242009 [patent_app_country] => US [patent_app_date] => 1999-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3332 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/415/06415309.pdf [firstpage_image] =>[orig_patent_app_number] => 09242009 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/242009
Method of and apparatus for generating random numbers Jun 3, 1999 Issued
Array ( [id] => 4272786 [patent_doc_number] => 06209016 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-03-27 [patent_title] => 'Co-processor for performing modular multiplication' [patent_app_type] => 1 [patent_app_number] => 9/091376 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5503 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/209/06209016.pdf [firstpage_image] =>[orig_patent_app_number] => 091376 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/091376
Co-processor for performing modular multiplication Jun 2, 1999 Issued
Array ( [id] => 1480627 [patent_doc_number] => 06389441 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-14 [patent_title] => 'Two dimensional moving average filter' [patent_app_type] => B1 [patent_app_number] => 09/322550 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2967 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/389/06389441.pdf [firstpage_image] =>[orig_patent_app_number] => 09322550 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/322550
Two dimensional moving average filter May 27, 1999 Issued
09/242300 DIGITAL SIGNAL CONVERTING METHOD AND DEVICE, TRANSFORMATION MATRIX GENERATING METHOD AND DEVICE, AND SUPPLY MEDIUM May 24, 1999 Abandoned
Array ( [id] => 1580078 [patent_doc_number] => 06470368 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-22 [patent_title] => 'Using tiling to improve performance in a sparse symmetric direct matrix solver' [patent_app_type] => B1 [patent_app_number] => 09/316173 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 5414 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/470/06470368.pdf [firstpage_image] =>[orig_patent_app_number] => 09316173 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/316173
Using tiling to improve performance in a sparse symmetric direct matrix solver May 20, 1999 Issued
Array ( [id] => 1465865 [patent_doc_number] => 06393452 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method and apparatus for performing load bypasses in a floating-point unit' [patent_app_type] => B1 [patent_app_number] => 09/316418 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 6153 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/393/06393452.pdf [firstpage_image] =>[orig_patent_app_number] => 09316418 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/316418
Method and apparatus for performing load bypasses in a floating-point unit May 20, 1999 Issued
Array ( [id] => 7638684 [patent_doc_number] => 06397236 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-28 [patent_title] => 'Hybrid technique for performing a column modification operation in a sparse symmetric direct matrix solver' [patent_app_type] => B1 [patent_app_number] => 09/316168 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5021 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 13 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/397/06397236.pdf [firstpage_image] =>[orig_patent_app_number] => 09316168 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/316168
Hybrid technique for performing a column modification operation in a sparse symmetric direct matrix solver May 20, 1999 Issued
Array ( [id] => 1497657 [patent_doc_number] => 06343306 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-29 [patent_title] => 'High speed one\'s complement adder' [patent_app_type] => B1 [patent_app_number] => 09/313949 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2408 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/343/06343306.pdf [firstpage_image] =>[orig_patent_app_number] => 09313949 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313949
High speed one's complement adder May 17, 1999 Issued
Array ( [id] => 1414690 [patent_doc_number] => 06549925 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-04-15 [patent_title] => 'Circuit for computing a fast fourier transform' [patent_app_type] => B1 [patent_app_number] => 09/311969 [patent_app_country] => US [patent_app_date] => 1999-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6641 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/549/06549925.pdf [firstpage_image] =>[orig_patent_app_number] => 09311969 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/311969
Circuit for computing a fast fourier transform May 13, 1999 Issued
Array ( [id] => 1431193 [patent_doc_number] => 06519621 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-11 [patent_title] => 'Arithmetic circuit for accumulative operation' [patent_app_type] => B1 [patent_app_number] => 09/307808 [patent_app_country] => US [patent_app_date] => 1999-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 14215 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/519/06519621.pdf [firstpage_image] =>[orig_patent_app_number] => 09307808 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/307808
Arithmetic circuit for accumulative operation May 9, 1999 Issued
Array ( [id] => 1489956 [patent_doc_number] => 06366936 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Pipelined fast fourier transform (FFT) processor having convergent block floating point (CBFP) algorithm' [patent_app_type] => B1 [patent_app_number] => 09/303688 [patent_app_country] => US [patent_app_date] => 1999-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 6598 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366936.pdf [firstpage_image] =>[orig_patent_app_number] => 09303688 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/303688
Pipelined fast fourier transform (FFT) processor having convergent block floating point (CBFP) algorithm May 2, 1999 Issued
Array ( [id] => 7635042 [patent_doc_number] => 06381624 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-30 [patent_title] => 'Faster multiply/accumulator' [patent_app_type] => B1 [patent_app_number] => 09/301830 [patent_app_country] => US [patent_app_date] => 1999-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3874 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/381/06381624.pdf [firstpage_image] =>[orig_patent_app_number] => 09301830 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/301830
Faster multiply/accumulator Apr 28, 1999 Issued
Array ( [id] => 1571999 [patent_doc_number] => 06377969 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Method for multiplication in Galois fields using programmable circuits' [patent_app_type] => B1 [patent_app_number] => 09/298651 [patent_app_country] => US [patent_app_date] => 1999-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4709 [patent_no_of_claims] => 50 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/377/06377969.pdf [firstpage_image] =>[orig_patent_app_number] => 09298651 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/298651
Method for multiplication in Galois fields using programmable circuits Apr 22, 1999 Issued
09/242850 FREQUENCY DIVIDING CIRCUIT Apr 20, 1999 Abandoned
09/202079 ARITHMETIC UNIT AND ARITHMETIC METHOD Apr 7, 1999 Abandoned
Array ( [id] => 4427239 [patent_doc_number] => 06226662 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-01 [patent_title] => 'Signal interpolation and decimation exploiting filter symmetry' [patent_app_type] => 1 [patent_app_number] => 9/285807 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 11518 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/226/06226662.pdf [firstpage_image] =>[orig_patent_app_number] => 285807 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/285807
Signal interpolation and decimation exploiting filter symmetry Mar 31, 1999 Issued
Array ( [id] => 1602047 [patent_doc_number] => 06493738 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Apparatus and method for rounding numerical values according to significant digits or rounding interval' [patent_app_type] => B1 [patent_app_number] => 09/283799 [patent_app_country] => US [patent_app_date] => 1999-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 10959 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 324 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493738.pdf [firstpage_image] =>[orig_patent_app_number] => 09283799 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/283799
Apparatus and method for rounding numerical values according to significant digits or rounding interval Mar 31, 1999 Issued
Array ( [id] => 1580095 [patent_doc_number] => 06470372 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-22 [patent_title] => 'Method for the performance of an integer division' [patent_app_type] => B1 [patent_app_number] => 09/282370 [patent_app_country] => US [patent_app_date] => 1999-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 7678 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 878 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/470/06470372.pdf [firstpage_image] =>[orig_patent_app_number] => 09282370 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/282370
Method for the performance of an integer division Mar 30, 1999 Issued
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