Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4426757 [patent_doc_number] => 06195671 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Electronic computing apparatus having arithmetic processing function and arithmetic processing method' [patent_app_type] => 1 [patent_app_number] => 9/058284 [patent_app_country] => US [patent_app_date] => 1998-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2905 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/195/06195671.pdf [firstpage_image] =>[orig_patent_app_number] => 058284 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/058284
Electronic computing apparatus having arithmetic processing function and arithmetic processing method Apr 9, 1998 Issued
09/057397 MULTIPLY-ADD UNIT AND DATA PROCESSING APPARATUS USING IT Apr 8, 1998 Issued
Array ( [id] => 4235723 [patent_doc_number] => 06041341 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Method and circuit for adding operands of multiple size' [patent_app_type] => 1 [patent_app_number] => 9/057138 [patent_app_country] => US [patent_app_date] => 1998-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3751 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041341.pdf [firstpage_image] =>[orig_patent_app_number] => 057138 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/057138
Method and circuit for adding operands of multiple size Apr 7, 1998 Issued
Array ( [id] => 1489969 [patent_doc_number] => 06366941 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Multi-dimensional Galois field multiplier' [patent_app_type] => B1 [patent_app_number] => 09/045000 [patent_app_country] => US [patent_app_date] => 1998-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3164 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/366/06366941.pdf [firstpage_image] =>[orig_patent_app_number] => 09045000 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/045000
Multi-dimensional Galois field multiplier Mar 19, 1998 Issued
Array ( [id] => 4316800 [patent_doc_number] => 06185595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Discrete cosine transformation operation circuit' [patent_app_type] => 1 [patent_app_number] => 8/952653 [patent_app_country] => US [patent_app_date] => 1998-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 9753 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 315 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/185/06185595.pdf [firstpage_image] =>[orig_patent_app_number] => 952653 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/952653
Discrete cosine transformation operation circuit Mar 9, 1998 Issued
Array ( [id] => 3931798 [patent_doc_number] => 06003051 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-14 [patent_title] => 'Magnetic storage device and filter adjusting method applied to the same' [patent_app_type] => 1 [patent_app_number] => 9/036694 [patent_app_country] => US [patent_app_date] => 1998-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 9434 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 280 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/003/06003051.pdf [firstpage_image] =>[orig_patent_app_number] => 036694 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/036694
Magnetic storage device and filter adjusting method applied to the same Mar 8, 1998 Issued
Array ( [id] => 4235676 [patent_doc_number] => 06041338 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Interpolation filter system' [patent_app_type] => 1 [patent_app_number] => 9/035016 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2459 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/041/06041338.pdf [firstpage_image] =>[orig_patent_app_number] => 035016 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035016
Interpolation filter system Mar 4, 1998 Issued
Array ( [id] => 4161393 [patent_doc_number] => 06032169 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-02-29 [patent_title] => 'Arithmetic circuit for calculating a square' [patent_app_type] => 1 [patent_app_number] => 9/035434 [patent_app_country] => US [patent_app_date] => 1998-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3991 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 357 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/032/06032169.pdf [firstpage_image] =>[orig_patent_app_number] => 035434 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/035434
Arithmetic circuit for calculating a square Mar 4, 1998 Issued
Array ( [id] => 4259148 [patent_doc_number] => 06167416 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-26 [patent_title] => 'System and method for RAM-partitioning to exploit parallelism of radix-2 elements in FPGAS' [patent_app_type] => 1 [patent_app_number] => 9/034739 [patent_app_country] => US [patent_app_date] => 1998-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 3305 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/167/06167416.pdf [firstpage_image] =>[orig_patent_app_number] => 034739 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034739
System and method for RAM-partitioning to exploit parallelism of radix-2 elements in FPGAS Mar 3, 1998 Issued
Array ( [id] => 4099133 [patent_doc_number] => 06055554 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Floating point binary quad word format multiply instruction unit' [patent_app_type] => 1 [patent_app_number] => 9/034718 [patent_app_country] => US [patent_app_date] => 1998-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3608 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 565 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055554.pdf [firstpage_image] =>[orig_patent_app_number] => 034718 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/034718
Floating point binary quad word format multiply instruction unit Mar 3, 1998 Issued
Array ( [id] => 4099122 [patent_doc_number] => 06055553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-04-25 [patent_title] => 'Apparatus for computing exponential and trigonometric functions' [patent_app_type] => 1 [patent_app_number] => 9/028178 [patent_app_country] => US [patent_app_date] => 1998-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4022 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 288 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/055/06055553.pdf [firstpage_image] =>[orig_patent_app_number] => 028178 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/028178
Apparatus for computing exponential and trigonometric functions Feb 22, 1998 Issued
Array ( [id] => 4146479 [patent_doc_number] => 06128636 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Method for interfacing floating point and integer processes in a computer system' [patent_app_type] => 1 [patent_app_number] => 9/021969 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1732 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/128/06128636.pdf [firstpage_image] =>[orig_patent_app_number] => 021969 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021969
Method for interfacing floating point and integer processes in a computer system Feb 10, 1998 Issued
Array ( [id] => 3966135 [patent_doc_number] => 05983250 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-09 [patent_title] => 'Arithmetic circuit for obtaining absolute-valued distance' [patent_app_type] => 1 [patent_app_number] => 9/021985 [patent_app_country] => US [patent_app_date] => 1998-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7002 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/983/05983250.pdf [firstpage_image] =>[orig_patent_app_number] => 021985 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/021985
Arithmetic circuit for obtaining absolute-valued distance Feb 10, 1998 Issued
Array ( [id] => 4373424 [patent_doc_number] => 06175851 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Fast adder/subtractor for signed floating point numbers' [patent_app_type] => 1 [patent_app_number] => 9/020152 [patent_app_country] => US [patent_app_date] => 1998-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 6698 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 517 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175851.pdf [firstpage_image] =>[orig_patent_app_number] => 020152 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/020152
Fast adder/subtractor for signed floating point numbers Feb 5, 1998 Issued
Array ( [id] => 4084400 [patent_doc_number] => 06009446 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Method and apparatus for digital filtration of signals' [patent_app_type] => 1 [patent_app_number] => 9/018185 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 2356 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009446.pdf [firstpage_image] =>[orig_patent_app_number] => 018185 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018185
Method and apparatus for digital filtration of signals Feb 3, 1998 Issued
Array ( [id] => 4424318 [patent_doc_number] => 06230176 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-08 [patent_title] => 'Fast fourier transform processing device, fast fourier transform processing system, and fast fourier transform processing method' [patent_app_type] => 1 [patent_app_number] => 9/018530 [patent_app_country] => US [patent_app_date] => 1998-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 32640 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 464 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/230/06230176.pdf [firstpage_image] =>[orig_patent_app_number] => 018530 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/018530
Fast fourier transform processing device, fast fourier transform processing system, and fast fourier transform processing method Feb 3, 1998 Issued
Array ( [id] => 4373405 [patent_doc_number] => 06175850 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Scheme for carrying out modular calculations based on redundant binary calculation' [patent_app_type] => 1 [patent_app_number] => 9/017520 [patent_app_country] => US [patent_app_date] => 1998-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 7950 [patent_no_of_claims] => 63 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/175/06175850.pdf [firstpage_image] =>[orig_patent_app_number] => 017520 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/017520
Scheme for carrying out modular calculations based on redundant binary calculation Feb 1, 1998 Issued
09/015436 BIPARTITE LOOK-UP TABLE WITH OUTPUT VALUES HAVING MINIMIZED ABSOLUTE ERROR Jan 28, 1998 Abandoned
Array ( [id] => 4380281 [patent_doc_number] => 06256653 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-03 [patent_title] => 'Multi-function bipartite look-up table' [patent_app_type] => 1 [patent_app_number] => 9/015084 [patent_app_country] => US [patent_app_date] => 1998-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 27 [patent_no_of_words] => 19388 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/256/06256653.pdf [firstpage_image] =>[orig_patent_app_number] => 015084 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/015084
Multi-function bipartite look-up table Jan 28, 1998 Issued
Array ( [id] => 4178056 [patent_doc_number] => 06115725 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-05 [patent_title] => 'Semiconductor arithmetic apparatus' [patent_app_type] => 1 [patent_app_number] => 9/014644 [patent_app_country] => US [patent_app_date] => 1998-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6254 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/115/06115725.pdf [firstpage_image] =>[orig_patent_app_number] => 014644 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/014644
Semiconductor arithmetic apparatus Jan 27, 1998 Issued
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