
Chuong D. Ngo
Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )
| Most Active Art Unit | 2193 |
| Art Unit(s) | 2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193 |
| Total Applications | 2158 |
| Issued Applications | 1754 |
| Pending Applications | 68 |
| Abandoned Applications | 343 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3922738
[patent_doc_number] => 05928310
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Digital device control method and system via linear function generator implementation using adder for intercept'
[patent_app_type] => 1
[patent_app_number] => 8/919389
[patent_app_country] => US
[patent_app_date] => 1997-08-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 18
[patent_no_of_words] => 6335
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/928/05928310.pdf
[firstpage_image] =>[orig_patent_app_number] => 919389
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/919389 | Digital device control method and system via linear function generator implementation using adder for intercept | Aug 27, 1997 | Issued |
| 08/918090 | VARIABLE BLOCK SIZE 2-DIMENSIONAL INVERSE DISCRETE COSINE TRANSFORM ENGINE | Aug 24, 1997 | Abandoned |
Array
(
[id] => 3882674
[patent_doc_number] => 05838600
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-17
[patent_title] => 'DC gain invariant filter implementation'
[patent_app_type] => 1
[patent_app_number] => 8/912795
[patent_app_country] => US
[patent_app_date] => 1997-08-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3217
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/838/05838600.pdf
[firstpage_image] =>[orig_patent_app_number] => 912795
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/912795 | DC gain invariant filter implementation | Aug 17, 1997 | Issued |
Array
(
[id] => 4099160
[patent_doc_number] => 06055556
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-04-25
[patent_title] => 'Apparatus and method for matrix multiplication'
[patent_app_type] => 1
[patent_app_number] => 8/912224
[patent_app_country] => US
[patent_app_date] => 1997-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 9092
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 332
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/055/06055556.pdf
[firstpage_image] =>[orig_patent_app_number] => 912224
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/912224 | Apparatus and method for matrix multiplication | Aug 14, 1997 | Issued |
Array
(
[id] => 4014983
[patent_doc_number] => 05859788
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-12
[patent_title] => 'Modulated lapped transform method'
[patent_app_type] => 1
[patent_app_number] => 8/911614
[patent_app_country] => US
[patent_app_date] => 1997-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 15079
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/859/05859788.pdf
[firstpage_image] =>[orig_patent_app_number] => 911614
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/911614 | Modulated lapped transform method | Aug 14, 1997 | Issued |
Array
(
[id] => 3988356
[patent_doc_number] => 05917737
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Fourier transform mechanization using one bit kernel function'
[patent_app_type] => 1
[patent_app_number] => 8/914348
[patent_app_country] => US
[patent_app_date] => 1997-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 3519
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/917/05917737.pdf
[firstpage_image] =>[orig_patent_app_number] => 914348
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/914348 | Fourier transform mechanization using one bit kernel function | Aug 14, 1997 | Issued |
Array
(
[id] => 4038283
[patent_doc_number] => 05903483
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-11
[patent_title] => 'Frequency domain kernel processor'
[patent_app_type] => 1
[patent_app_number] => 8/909748
[patent_app_country] => US
[patent_app_date] => 1997-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2090
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/903/05903483.pdf
[firstpage_image] =>[orig_patent_app_number] => 909748
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/909748 | Frequency domain kernel processor | Aug 11, 1997 | Issued |
Array
(
[id] => 1225113
[patent_doc_number] => 06704761
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2004-03-09
[patent_title] => 'Carry-save multiplier/accumulator system and method'
[patent_app_type] => B1
[patent_app_number] => 08/906537
[patent_app_country] => US
[patent_app_date] => 1997-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4031
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/704/06704761.pdf
[firstpage_image] =>[orig_patent_app_number] => 08906537
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/906537 | Carry-save multiplier/accumulator system and method | Aug 4, 1997 | Issued |
Array
(
[id] => 4100473
[patent_doc_number] => 06018758
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-25
[patent_title] => 'Squarer with diagonal row merged into folded partial product array'
[patent_app_type] => 1
[patent_app_number] => 8/903300
[patent_app_country] => US
[patent_app_date] => 1997-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4025
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 122
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/018/06018758.pdf
[firstpage_image] =>[orig_patent_app_number] => 903300
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/903300 | Squarer with diagonal row merged into folded partial product array | Jul 29, 1997 | Issued |
Array
(
[id] => 4100396
[patent_doc_number] => 06018753
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-01-25
[patent_title] => 'Interpolating filter banks in arbitrary dimensions'
[patent_app_type] => 1
[patent_app_number] => 8/902557
[patent_app_country] => US
[patent_app_date] => 1997-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 11831
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/018/06018753.pdf
[firstpage_image] =>[orig_patent_app_number] => 902557
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/902557 | Interpolating filter banks in arbitrary dimensions | Jul 28, 1997 | Issued |
Array
(
[id] => 4193722
[patent_doc_number] => 06085209
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 2000-07-04
[patent_title] => 'Method and system for performing an IIR filtering operation'
[patent_app_type] => 1
[patent_app_number] => 8/999618
[patent_app_country] => US
[patent_app_date] => 1997-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 20
[patent_no_of_words] => 13071
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/06/085/06085209.pdf
[firstpage_image] =>[orig_patent_app_number] => 999618
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/999618 | Method and system for performing an IIR filtering operation | Jul 27, 1997 | Issued |
Array
(
[id] => 3993521
[patent_doc_number] => 05862064
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-01-19
[patent_title] => 'Median filter apparatus and method therefor'
[patent_app_type] => 1
[patent_app_number] => 8/889753
[patent_app_country] => US
[patent_app_date] => 1997-07-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 2811
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/862/05862064.pdf
[firstpage_image] =>[orig_patent_app_number] => 889753
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/889753 | Median filter apparatus and method therefor | Jul 7, 1997 | Issued |
Array
(
[id] => 3891806
[patent_doc_number] => 05805480
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-08
[patent_title] => 'Rotationally predictive adaptive filter'
[patent_app_type] => 1
[patent_app_number] => 8/887521
[patent_app_country] => US
[patent_app_date] => 1997-07-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 6973
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 140
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/805/05805480.pdf
[firstpage_image] =>[orig_patent_app_number] => 887521
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/887521 | Rotationally predictive adaptive filter | Jul 2, 1997 | Issued |
Array
(
[id] => 3950274
[patent_doc_number] => 05930158
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-07-27
[patent_title] => 'Processor with instruction set for audio effects'
[patent_app_type] => 1
[patent_app_number] => 8/886920
[patent_app_country] => US
[patent_app_date] => 1997-07-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 12
[patent_no_of_words] => 7844
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/930/05930158.pdf
[firstpage_image] =>[orig_patent_app_number] => 886920
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/886920 | Processor with instruction set for audio effects | Jul 1, 1997 | Issued |
Array
(
[id] => 4025576
[patent_doc_number] => 05941940
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-24
[patent_title] => 'Digital signal processor architecture optimized for performing fast Fourier Transforms'
[patent_app_type] => 1
[patent_app_number] => 8/884691
[patent_app_country] => US
[patent_app_date] => 1997-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 3910
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/941/05941940.pdf
[firstpage_image] =>[orig_patent_app_number] => 884691
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/884691 | Digital signal processor architecture optimized for performing fast Fourier Transforms | Jun 29, 1997 | Issued |
Array
(
[id] => 4054209
[patent_doc_number] => 05912826
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-15
[patent_title] => 'Data processing method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/875055
[patent_app_country] => US
[patent_app_date] => 1997-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 9818
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/912/05912826.pdf
[firstpage_image] =>[orig_patent_app_number] => 875055
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/875055 | Data processing method and apparatus | Jun 23, 1997 | Issued |
Array
(
[id] => 3988397
[patent_doc_number] => 05917740
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-06-29
[patent_title] => 'Apparatus for reducing a computational result to the range boundaries of a signed 16-bit integer in case of overflow'
[patent_app_type] => 1
[patent_app_number] => 8/881510
[patent_app_country] => US
[patent_app_date] => 1997-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3659
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 139
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/917/05917740.pdf
[firstpage_image] =>[orig_patent_app_number] => 881510
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/881510 | Apparatus for reducing a computational result to the range boundaries of a signed 16-bit integer in case of overflow | Jun 23, 1997 | Issued |
Array
(
[id] => 3939891
[patent_doc_number] => 05953240
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-09-14
[patent_title] => 'SIMD TCP/UDP checksumming in a CPU'
[patent_app_type] => 1
[patent_app_number] => 8/880925
[patent_app_country] => US
[patent_app_date] => 1997-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 2864
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/953/05953240.pdf
[firstpage_image] =>[orig_patent_app_number] => 880925
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/880925 | SIMD TCP/UDP checksumming in a CPU | Jun 22, 1997 | Issued |
Array
(
[id] => 4060892
[patent_doc_number] => 05870320
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-09
[patent_title] => 'Method for reducing a computational result to the range boundaries of a signed 16-bit integer in case of overflow'
[patent_app_type] => 1
[patent_app_number] => 8/881720
[patent_app_country] => US
[patent_app_date] => 1997-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 5
[patent_no_of_words] => 3671
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/870/05870320.pdf
[firstpage_image] =>[orig_patent_app_number] => 881720
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/881720 | Method for reducing a computational result to the range boundaries of a signed 16-bit integer in case of overflow | Jun 22, 1997 | Issued |
Array
(
[id] => 4036820
[patent_doc_number] => 05883820
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-03-16
[patent_title] => 'Computer system'
[patent_app_type] => 1
[patent_app_number] => 8/870701
[patent_app_country] => US
[patent_app_date] => 1997-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 24
[patent_no_of_words] => 9859
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 144
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/883/05883820.pdf
[firstpage_image] =>[orig_patent_app_number] => 870701
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/870701 | Computer system | Jun 5, 1997 | Issued |