Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3657655 [patent_doc_number] => 05638309 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Pseudo-random pattern generating circuit' [patent_app_type] => 1 [patent_app_number] => 8/493310 [patent_app_country] => US [patent_app_date] => 1995-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3207 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 26 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638309.pdf [firstpage_image] =>[orig_patent_app_number] => 493310 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/493310
Pseudo-random pattern generating circuit Jun 20, 1995 Issued
Array ( [id] => 3741008 [patent_doc_number] => 05636151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Adaptive filter capable of removing a residual echo at a rapid speed' [patent_app_type] => 1 [patent_app_number] => 8/490859 [patent_app_country] => US [patent_app_date] => 1995-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4570 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636151.pdf [firstpage_image] =>[orig_patent_app_number] => 490859 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/490859
Adaptive filter capable of removing a residual echo at a rapid speed Jun 14, 1995 Issued
Array ( [id] => 3668989 [patent_doc_number] => 05592405 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'Multiple operations employing divided arithmetic logic unit and multiple flags register' [patent_app_type] => 1 [patent_app_number] => 8/484579 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 64 [patent_no_of_words] => 37321 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592405.pdf [firstpage_image] =>[orig_patent_app_number] => 484579 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/484579
Multiple operations employing divided arithmetic logic unit and multiple flags register Jun 6, 1995 Issued
Array ( [id] => 3826035 [patent_doc_number] => 05771186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-23 [patent_title] => 'System and method for multiplying in a data processing system' [patent_app_type] => 1 [patent_app_number] => 8/483768 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3085 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/771/05771186.pdf [firstpage_image] =>[orig_patent_app_number] => 483768 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/483768
System and method for multiplying in a data processing system Jun 6, 1995 Issued
Array ( [id] => 3704410 [patent_doc_number] => 05596519 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Iterative division apparatus, system and method employing left most one\'s detection and left most one\'s detection with exclusive OR' [patent_app_type] => 1 [patent_app_number] => 8/484113 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 70 [patent_no_of_words] => 99422 [patent_no_of_claims] => 60 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 496 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596519.pdf [firstpage_image] =>[orig_patent_app_number] => 484113 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/484113
Iterative division apparatus, system and method employing left most one's detection and left most one's detection with exclusive OR Jun 6, 1995 Issued
Array ( [id] => 3697848 [patent_doc_number] => 05691931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-25 [patent_title] => 'Low power adder for accumulation' [patent_app_type] => 1 [patent_app_number] => 8/481048 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 3374 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/691/05691931.pdf [firstpage_image] =>[orig_patent_app_number] => 481048 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/481048
Low power adder for accumulation Jun 6, 1995 Issued
Array ( [id] => 3659175 [patent_doc_number] => 05606520 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-02-25 [patent_title] => 'Address generator with controllable modulo power of two addressing capability' [patent_app_type] => 1 [patent_app_number] => 8/484540 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 64 [patent_no_of_words] => 46616 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/606/05606520.pdf [firstpage_image] =>[orig_patent_app_number] => 484540 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/484540
Address generator with controllable modulo power of two addressing capability Jun 6, 1995 Issued
Array ( [id] => 3704051 [patent_doc_number] => 05680339 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-21 [patent_title] => 'Method for rounding using redundant coded multiply result' [patent_app_type] => 1 [patent_app_number] => 8/484625 [patent_app_country] => US [patent_app_date] => 1995-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 70 [patent_no_of_words] => 98413 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 473 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/680/05680339.pdf [firstpage_image] =>[orig_patent_app_number] => 484625 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/484625
Method for rounding using redundant coded multiply result Jun 6, 1995 Issued
Array ( [id] => 3740782 [patent_doc_number] => 05666301 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Multiplier carrying out numeric calculation at high speed' [patent_app_type] => 1 [patent_app_number] => 8/460948 [patent_app_country] => US [patent_app_date] => 1995-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4691 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666301.pdf [firstpage_image] =>[orig_patent_app_number] => 460948 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/460948
Multiplier carrying out numeric calculation at high speed Jun 4, 1995 Issued
08/463152 METHOD AND APPARATUS FOR APPROXIMATING A SIGMOIDAL RESPONSE USING DIGITAL CIRCUITRY Jun 4, 1995 Abandoned
Array ( [id] => 3822368 [patent_doc_number] => 05710729 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-20 [patent_title] => 'Filtering method and digital over sampler filter with a finite impulse response having a simplified control unit' [patent_app_type] => 1 [patent_app_number] => 8/451029 [patent_app_country] => US [patent_app_date] => 1995-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 2630 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/710/05710729.pdf [firstpage_image] =>[orig_patent_app_number] => 451029 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/451029
Filtering method and digital over sampler filter with a finite impulse response having a simplified control unit May 30, 1995 Issued
Array ( [id] => 3889954 [patent_doc_number] => 05729484 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-17 [patent_title] => 'Processes, apparatuses, and systems of encoding and decoding signals using transforms' [patent_app_type] => 1 [patent_app_number] => 8/446321 [patent_app_country] => US [patent_app_date] => 1995-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5950 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/729/05729484.pdf [firstpage_image] =>[orig_patent_app_number] => 446321 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/446321
Processes, apparatuses, and systems of encoding and decoding signals using transforms May 21, 1995 Issued
Array ( [id] => 3740752 [patent_doc_number] => 05666299 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-09 [patent_title] => 'Asynchronous digital sample rate converter' [patent_app_type] => 1 [patent_app_number] => 8/446036 [patent_app_country] => US [patent_app_date] => 1995-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 37 [patent_no_of_words] => 15920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/666/05666299.pdf [firstpage_image] =>[orig_patent_app_number] => 446036 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/446036
Asynchronous digital sample rate converter May 18, 1995 Issued
08/446008 ASYNCHRONOUS DIGITAL SAMPLE RATE CONVERTER May 18, 1995 Abandoned
Array ( [id] => 3664307 [patent_doc_number] => 05623432 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Microsystem with low energy consumption' [patent_app_type] => 1 [patent_app_number] => 8/438790 [patent_app_country] => US [patent_app_date] => 1995-05-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 3740 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623432.pdf [firstpage_image] =>[orig_patent_app_number] => 438790 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/438790
Microsystem with low energy consumption May 10, 1995 Issued
Array ( [id] => 3691223 [patent_doc_number] => 05633818 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Method and apparatus for performing floating point arithmetic operation and rounding the result thereof' [patent_app_type] => 1 [patent_app_number] => 8/438142 [patent_app_country] => US [patent_app_date] => 1995-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 12352 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/633/05633818.pdf [firstpage_image] =>[orig_patent_app_number] => 438142 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/438142
Method and apparatus for performing floating point arithmetic operation and rounding the result thereof May 7, 1995 Issued
Array ( [id] => 3704359 [patent_doc_number] => 05596516 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-21 [patent_title] => 'Code sequence generator' [patent_app_type] => 1 [patent_app_number] => 8/428389 [patent_app_country] => US [patent_app_date] => 1995-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2706 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/596/05596516.pdf [firstpage_image] =>[orig_patent_app_number] => 428389 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/428389
Code sequence generator Apr 24, 1995 Issued
Array ( [id] => 3791779 [patent_doc_number] => 05818743 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-06 [patent_title] => 'Low power multiplier' [patent_app_type] => 1 [patent_app_number] => 8/426349 [patent_app_country] => US [patent_app_date] => 1995-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 20 [patent_no_of_words] => 5975 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/818/05818743.pdf [firstpage_image] =>[orig_patent_app_number] => 426349 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/426349
Low power multiplier Apr 20, 1995 Issued
Array ( [id] => 3900422 [patent_doc_number] => 05777905 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Obstetrical and gynecological event and status calculator' [patent_app_type] => 1 [patent_app_number] => 8/425098 [patent_app_country] => US [patent_app_date] => 1995-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 5530 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/777/05777905.pdf [firstpage_image] =>[orig_patent_app_number] => 425098 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/425098
Obstetrical and gynecological event and status calculator Apr 19, 1995 Issued
Array ( [id] => 3897537 [patent_doc_number] => 05715186 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-02-03 [patent_title] => 'Digital processing device with minimum and maximum search instructions' [patent_app_type] => 1 [patent_app_number] => 8/424870 [patent_app_country] => US [patent_app_date] => 1995-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 3171 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/715/05715186.pdf [firstpage_image] =>[orig_patent_app_number] => 424870 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/424870
Digital processing device with minimum and maximum search instructions Apr 16, 1995 Issued
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