Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
08/422264 DATA PROCESSING CIRCUIT, MULTIPLIER UNIT WITH PIPELINE, ALU AND SHIFT REGISTER UNIT FOR USE IN A DATA PROCESSING CIRCUIT Apr 13, 1995 Abandoned
08/420970 PROCESS AND DEVICE WITH DIGITAL SIGNAL PROCESSOR FOR THE IMPLEMENTATION OF A VITERBI ALGORITHM Apr 12, 1995 Abandoned
Array ( [id] => 3704936 [patent_doc_number] => 05619442 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-08 [patent_title] => 'Alternating polarity carry look ahead adder circuit' [patent_app_type] => 1 [patent_app_number] => 8/418829 [patent_app_country] => US [patent_app_date] => 1995-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 4869 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 698 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/619/05619442.pdf [firstpage_image] =>[orig_patent_app_number] => 418829 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/418829
Alternating polarity carry look ahead adder circuit Apr 6, 1995 Issued
Array ( [id] => 3740994 [patent_doc_number] => 05636150 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Data driven type digital filter unit and data driven type information processor including the same' [patent_app_type] => 1 [patent_app_number] => 8/416538 [patent_app_country] => US [patent_app_date] => 1995-04-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 52 [patent_figures_cnt] => 111 [patent_no_of_words] => 25772 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 242 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636150.pdf [firstpage_image] =>[orig_patent_app_number] => 416538 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/416538
Data driven type digital filter unit and data driven type information processor including the same Apr 2, 1995 Issued
Array ( [id] => 3638607 [patent_doc_number] => 05687106 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-11-11 [patent_title] => 'Implementation of binary floating point using hexadecimal floating point unit' [patent_app_type] => 1 [patent_app_number] => 8/414250 [patent_app_country] => US [patent_app_date] => 1995-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10402 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/687/05687106.pdf [firstpage_image] =>[orig_patent_app_number] => 414250 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/414250
Implementation of binary floating point using hexadecimal floating point unit Mar 30, 1995 Issued
90/003751 HANDS-FREE, USER-SUPPORTED PORTABLE COMPUTER Mar 14, 1995 Issued
Array ( [id] => 3541119 [patent_doc_number] => 05583806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-10 [patent_title] => 'Optimized binary adder for concurrently generating effective and intermediate addresses' [patent_app_type] => 1 [patent_app_number] => 8/403011 [patent_app_country] => US [patent_app_date] => 1995-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3582 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/583/05583806.pdf [firstpage_image] =>[orig_patent_app_number] => 403011 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/403011
Optimized binary adder for concurrently generating effective and intermediate addresses Mar 9, 1995 Issued
Array ( [id] => 3657694 [patent_doc_number] => 05638312 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Method and apparatus for generating a zero bit status flag in a microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/397800 [patent_app_country] => US [patent_app_date] => 1995-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 5982 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638312.pdf [firstpage_image] =>[orig_patent_app_number] => 397800 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/397800
Method and apparatus for generating a zero bit status flag in a microprocessor Mar 2, 1995 Issued
Array ( [id] => 3851726 [patent_doc_number] => 05708595 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-01-13 [patent_title] => 'Efficient median filter and method therefor' [patent_app_type] => 1 [patent_app_number] => 8/398340 [patent_app_country] => US [patent_app_date] => 1995-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3032 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/708/05708595.pdf [firstpage_image] =>[orig_patent_app_number] => 398340 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/398340
Efficient median filter and method therefor Mar 2, 1995 Issued
Array ( [id] => 3523118 [patent_doc_number] => 05513120 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-30 [patent_title] => 'Special interpolation filters' [patent_app_type] => 1 [patent_app_number] => 8/390276 [patent_app_country] => US [patent_app_date] => 1995-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2835 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/513/05513120.pdf [firstpage_image] =>[orig_patent_app_number] => 390276 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/390276
Special interpolation filters Feb 14, 1995 Issued
08/388289 ITERATIVE INTERPOLATOR Feb 13, 1995 Abandoned
Array ( [id] => 3835845 [patent_doc_number] => 05732005 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-03-24 [patent_title] => 'Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation' [patent_app_type] => 1 [patent_app_number] => 8/386980 [patent_app_country] => US [patent_app_date] => 1995-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3385 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/732/05732005.pdf [firstpage_image] =>[orig_patent_app_number] => 386980 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/386980
Single-precision, floating-point register array for floating-point units performing double-precision operations by emulation Feb 9, 1995 Issued
08/386979 LOAD-STORE UNIT AND METHOD OF SAVING AND RESTORING SINGLE-PRECISION FLOATING-POINT REGISTERS IN A DOUBLE-PRECISION ARCHITECTURE Feb 9, 1995 Abandoned
Array ( [id] => 3666615 [patent_doc_number] => 05659494 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-08-19 [patent_title] => 'Method and apparatus for determination of an approximate standard deviation in an image processor' [patent_app_type] => 1 [patent_app_number] => 8/385990 [patent_app_country] => US [patent_app_date] => 1995-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1844 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/659/05659494.pdf [firstpage_image] =>[orig_patent_app_number] => 385990 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/385990
Method and apparatus for determination of an approximate standard deviation in an image processor Feb 8, 1995 Issued
Array ( [id] => 3560512 [patent_doc_number] => 05572452 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-05 [patent_title] => 'Filter with feed-forward AGC' [patent_app_type] => 1 [patent_app_number] => 8/383589 [patent_app_country] => US [patent_app_date] => 1995-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3206 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/572/05572452.pdf [firstpage_image] =>[orig_patent_app_number] => 383589 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/383589
Filter with feed-forward AGC Feb 2, 1995 Issued
08/380252 METHOD APPARATUS, AND SYSTEM FOR TRANSFORMING SIGNALS Jan 29, 1995 Abandoned
Array ( [id] => 3507393 [patent_doc_number] => 05532947 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Combined decoder/adder circuit which provides improved access speed to a cache' [patent_app_type] => 1 [patent_app_number] => 8/377820 [patent_app_country] => US [patent_app_date] => 1995-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2234 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532947.pdf [firstpage_image] =>[orig_patent_app_number] => 377820 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/377820
Combined decoder/adder circuit which provides improved access speed to a cache Jan 24, 1995 Issued
08/373739 SYSTEM AND METHOD FOR CLIPPING INTEGERS Jan 16, 1995 Abandoned
08/371560 COMPUTER SYSTEM Jan 10, 1995 Abandoned
Array ( [id] => 3558166 [patent_doc_number] => 05555517 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-10 [patent_title] => 'Apparatus and method for efficient carry skip incrementation' [patent_app_type] => 1 [patent_app_number] => 8/368479 [patent_app_country] => US [patent_app_date] => 1995-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4536 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/555/05555517.pdf [firstpage_image] =>[orig_patent_app_number] => 368479 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/368479
Apparatus and method for efficient carry skip incrementation Jan 3, 1995 Issued
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