| Application number | Title of the application | Filing Date | Status |
|---|
Array
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[patent_issue_date] => 1997-06-10
[patent_title] => 'Dividing apparatus for use in a data processing apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/329317
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[patent_app_date] => 1994-10-26
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Array
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[patent_doc_number] => 05598361
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-28
[patent_title] => 'Discrete cosine transform processor'
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[firstpage_image] =>[orig_patent_app_number] => 329382
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/329382 | Discrete cosine transform processor | Oct 25, 1994 | Issued |
Array
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[id] => 3549477
[patent_doc_number] => 05481488
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-02
[patent_title] => 'Block floating point mechanism for fast Fourier transform processor'
[patent_app_type] => 1
[patent_app_number] => 8/328713
[patent_app_country] => US
[patent_app_date] => 1994-10-21
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[firstpage_image] =>[orig_patent_app_number] => 328713
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/328713 | Block floating point mechanism for fast Fourier transform processor | Oct 20, 1994 | Issued |
Array
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[id] => 3602693
[patent_doc_number] => 05521856
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-05-28
[patent_title] => 'Multiplier capable of calculating double precision, single precision, inner product and multiplying complex'
[patent_app_type] => 1
[patent_app_number] => 8/326210
[patent_app_country] => US
[patent_app_date] => 1994-10-20
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[pdf_file] => patents/05/521/05521856.pdf
[firstpage_image] =>[orig_patent_app_number] => 326210
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/326210 | Multiplier capable of calculating double precision, single precision, inner product and multiplying complex | Oct 19, 1994 | Issued |
Array
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[id] => 3706565
[patent_doc_number] => 05677860
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Overflow and underflow processing circuit of a binary adder'
[patent_app_type] => 1
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[patent_app_date] => 1994-10-18
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Array
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[id] => 3789011
[patent_doc_number] => 05808927
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[patent_kind] => NA
[patent_issue_date] => 1998-09-15
[patent_title] => 'Apparatus for performing two\'s complement and unsigned multiply accumulate'
[patent_app_type] => 1
[patent_app_number] => 8/324991
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/324991 | Apparatus for performing two's complement and unsigned multiply accumulate | Oct 17, 1994 | Issued |
| 08/324439 | OPTIMIZED BINARY ADDER FOR CONCURRENTLY GENERATING EFFECTIVE AND INTERMEDIATE ADDRESSES | Oct 16, 1994 | Abandoned |
Array
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[id] => 3526720
[patent_doc_number] => 05576982
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[patent_kind] => NA
[patent_issue_date] => 1996-11-19
[patent_title] => 'Fast significant bit calculator and its application to integer multiplication and division'
[patent_app_type] => 1
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[firstpage_image] =>[orig_patent_app_number] => 323780
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/323780 | Fast significant bit calculator and its application to integer multiplication and division | Oct 16, 1994 | Issued |
Array
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[patent_kind] => NA
[patent_issue_date] => 1996-12-03
[patent_title] => 'Carry skip adder with enhanced grouping scheme'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/325777 | Carry skip adder with enhanced grouping scheme | Oct 16, 1994 | Issued |
Array
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[id] => 3597642
[patent_doc_number] => 05550767
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[patent_kind] => NA
[patent_issue_date] => 1996-08-27
[patent_title] => 'Method and apparatus for detecting underflow and overflow'
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[firstpage_image] =>[orig_patent_app_number] => 323483
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/323483 | Method and apparatus for detecting underflow and overflow | Oct 13, 1994 | Issued |
Array
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[id] => 3428370
[patent_doc_number] => 05479362
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-12-26
[patent_title] => 'Digital band pass elliptic filter system'
[patent_app_type] => 1
[patent_app_number] => 8/322795
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[patent_app_date] => 1994-10-13
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/322795 | Digital band pass elliptic filter system | Oct 12, 1994 | Issued |
Array
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[id] => 3591837
[patent_doc_number] => 05581496
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-03
[patent_title] => 'Zero-flag generator for adder'
[patent_app_type] => 1
[patent_app_number] => 8/320236
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[patent_app_date] => 1994-10-11
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[firstpage_image] =>[orig_patent_app_number] => 320236
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/320236 | Zero-flag generator for adder | Oct 10, 1994 | Issued |
| 08/321380 | DIGITAL SIGNAL PROCESSING SYSTEM | Oct 10, 1994 | Abandoned |
| 08/319203 | NON-RESTORING FIXED-POINT DIVIDER APPARATUS | Oct 4, 1994 | Abandoned |
Array
(
[id] => 3597628
[patent_doc_number] => 05550766
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[patent_title] => 'High speed digital polarity correlator'
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[firstpage_image] =>[orig_patent_app_number] => 322302
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/322302 | High speed digital polarity correlator | Oct 3, 1994 | Issued |
Array
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Array
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[id] => 3596490
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[patent_kind] => NA
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[patent_title] => 'Delay generation filter'
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Array
(
[id] => 3601119
[patent_doc_number] => 05568410
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[patent_kind] => NA
[patent_issue_date] => 1996-10-22
[patent_title] => 'Method and apparatus for determining the amount of leading zeros or ones in a binary data field'
[patent_app_type] => 1
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/315051 | Method and apparatus for determining the amount of leading zeros or ones in a binary data field | Sep 28, 1994 | Issued |
| 08/310473 | OVERFLOW DETECTION FOR INTEGER-MULTIPLY INSTRUCTION | Sep 21, 1994 | Abandoned |
Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/306300 | Numerical arithmetic processing unit | Sep 14, 1994 | Issued |