Search

Chuong D. Ngo

Examiner (ID: 8858, Phone: (571)272-3731 , Office: P/2182 )

Most Active Art Unit
2193
Art Unit(s)
2787, 2306, 2121, 2899, 2124, 2182, 2183, 2193
Total Applications
2158
Issued Applications
1754
Pending Applications
68
Abandoned Applications
343

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3657722 [patent_doc_number] => 05638314 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-10 [patent_title] => 'Dividing apparatus for use in a data processing apparatus' [patent_app_type] => 1 [patent_app_number] => 8/329317 [patent_app_country] => US [patent_app_date] => 1994-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 16292 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 467 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/638/05638314.pdf [firstpage_image] =>[orig_patent_app_number] => 329317 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/329317
Dividing apparatus for use in a data processing apparatus Oct 25, 1994 Issued
Array ( [id] => 3673859 [patent_doc_number] => 05598361 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-28 [patent_title] => 'Discrete cosine transform processor' [patent_app_type] => 1 [patent_app_number] => 8/329382 [patent_app_country] => US [patent_app_date] => 1994-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 8707 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/598/05598361.pdf [firstpage_image] =>[orig_patent_app_number] => 329382 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/329382
Discrete cosine transform processor Oct 25, 1994 Issued
Array ( [id] => 3549477 [patent_doc_number] => 05481488 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Block floating point mechanism for fast Fourier transform processor' [patent_app_type] => 1 [patent_app_number] => 8/328713 [patent_app_country] => US [patent_app_date] => 1994-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2422 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481488.pdf [firstpage_image] =>[orig_patent_app_number] => 328713 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/328713
Block floating point mechanism for fast Fourier transform processor Oct 20, 1994 Issued
Array ( [id] => 3602693 [patent_doc_number] => 05521856 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-28 [patent_title] => 'Multiplier capable of calculating double precision, single precision, inner product and multiplying complex' [patent_app_type] => 1 [patent_app_number] => 8/326210 [patent_app_country] => US [patent_app_date] => 1994-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 8695 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 293 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/521/05521856.pdf [firstpage_image] =>[orig_patent_app_number] => 326210 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/326210
Multiplier capable of calculating double precision, single precision, inner product and multiplying complex Oct 19, 1994 Issued
Array ( [id] => 3706565 [patent_doc_number] => 05677860 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-10-14 [patent_title] => 'Overflow and underflow processing circuit of a binary adder' [patent_app_type] => 1 [patent_app_number] => 8/324643 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 22 [patent_no_of_words] => 6158 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/677/05677860.pdf [firstpage_image] =>[orig_patent_app_number] => 324643 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/324643
Overflow and underflow processing circuit of a binary adder Oct 17, 1994 Issued
Array ( [id] => 3789011 [patent_doc_number] => 05808927 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Apparatus for performing two\'s complement and unsigned multiply accumulate' [patent_app_type] => 1 [patent_app_number] => 8/324991 [patent_app_country] => US [patent_app_date] => 1994-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 35 [patent_figures_cnt] => 44 [patent_no_of_words] => 6637 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/808/05808927.pdf [firstpage_image] =>[orig_patent_app_number] => 324991 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/324991
Apparatus for performing two's complement and unsigned multiply accumulate Oct 17, 1994 Issued
08/324439 OPTIMIZED BINARY ADDER FOR CONCURRENTLY GENERATING EFFECTIVE AND INTERMEDIATE ADDRESSES Oct 16, 1994 Abandoned
Array ( [id] => 3526720 [patent_doc_number] => 05576982 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-11-19 [patent_title] => 'Fast significant bit calculator and its application to integer multiplication and division' [patent_app_type] => 1 [patent_app_number] => 8/323780 [patent_app_country] => US [patent_app_date] => 1994-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 6155 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/576/05576982.pdf [firstpage_image] =>[orig_patent_app_number] => 323780 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/323780
Fast significant bit calculator and its application to integer multiplication and division Oct 16, 1994 Issued
Array ( [id] => 3591852 [patent_doc_number] => 05581497 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Carry skip adder with enhanced grouping scheme' [patent_app_type] => 1 [patent_app_number] => 8/325777 [patent_app_country] => US [patent_app_date] => 1994-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 8363 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581497.pdf [firstpage_image] =>[orig_patent_app_number] => 325777 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/325777
Carry skip adder with enhanced grouping scheme Oct 16, 1994 Issued
Array ( [id] => 3597642 [patent_doc_number] => 05550767 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-27 [patent_title] => 'Method and apparatus for detecting underflow and overflow' [patent_app_type] => 1 [patent_app_number] => 8/323483 [patent_app_country] => US [patent_app_date] => 1994-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 18106 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/550/05550767.pdf [firstpage_image] =>[orig_patent_app_number] => 323483 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/323483
Method and apparatus for detecting underflow and overflow Oct 13, 1994 Issued
Array ( [id] => 3428370 [patent_doc_number] => 05479362 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-26 [patent_title] => 'Digital band pass elliptic filter system' [patent_app_type] => 1 [patent_app_number] => 8/322795 [patent_app_country] => US [patent_app_date] => 1994-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7382 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/479/05479362.pdf [firstpage_image] =>[orig_patent_app_number] => 322795 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/322795
Digital band pass elliptic filter system Oct 12, 1994 Issued
Array ( [id] => 3591837 [patent_doc_number] => 05581496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-12-03 [patent_title] => 'Zero-flag generator for adder' [patent_app_type] => 1 [patent_app_number] => 8/320236 [patent_app_country] => US [patent_app_date] => 1994-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 1807 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/581/05581496.pdf [firstpage_image] =>[orig_patent_app_number] => 320236 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/320236
Zero-flag generator for adder Oct 10, 1994 Issued
08/321380 DIGITAL SIGNAL PROCESSING SYSTEM Oct 10, 1994 Abandoned
08/319203 NON-RESTORING FIXED-POINT DIVIDER APPARATUS Oct 4, 1994 Abandoned
Array ( [id] => 3597628 [patent_doc_number] => 05550766 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-27 [patent_title] => 'High speed digital polarity correlator' [patent_app_type] => 1 [patent_app_number] => 8/322302 [patent_app_country] => US [patent_app_date] => 1994-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2519 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 416 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/550/05550766.pdf [firstpage_image] =>[orig_patent_app_number] => 322302 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/322302
High speed digital polarity correlator Oct 3, 1994 Issued
Array ( [id] => 3741105 [patent_doc_number] => 05636157 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-06-03 [patent_title] => 'Modular 64-bit integer adder' [patent_app_type] => 1 [patent_app_number] => 8/317073 [patent_app_country] => US [patent_app_date] => 1994-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 30 [patent_no_of_words] => 5621 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/636/05636157.pdf [firstpage_image] =>[orig_patent_app_number] => 317073 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/317073
Modular 64-bit integer adder Oct 2, 1994 Issued
Array ( [id] => 3596490 [patent_doc_number] => 05553013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Delay generation filter' [patent_app_type] => 1 [patent_app_number] => 8/316012 [patent_app_country] => US [patent_app_date] => 1994-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2701 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553013.pdf [firstpage_image] =>[orig_patent_app_number] => 316012 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/316012
Delay generation filter Sep 29, 1994 Issued
Array ( [id] => 3601119 [patent_doc_number] => 05568410 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Method and apparatus for determining the amount of leading zeros or ones in a binary data field' [patent_app_type] => 1 [patent_app_number] => 8/315051 [patent_app_country] => US [patent_app_date] => 1994-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 7356 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 221 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568410.pdf [firstpage_image] =>[orig_patent_app_number] => 315051 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/315051
Method and apparatus for determining the amount of leading zeros or ones in a binary data field Sep 28, 1994 Issued
08/310473 OVERFLOW DETECTION FOR INTEGER-MULTIPLY INSTRUCTION Sep 21, 1994 Abandoned
Array ( [id] => 3507258 [patent_doc_number] => 05532938 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-02 [patent_title] => 'Numerical arithmetic processing unit' [patent_app_type] => 1 [patent_app_number] => 8/306300 [patent_app_country] => US [patent_app_date] => 1994-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 66 [patent_no_of_words] => 34438 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/532/05532938.pdf [firstpage_image] =>[orig_patent_app_number] => 306300 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/306300
Numerical arithmetic processing unit Sep 14, 1994 Issued
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