| Application number | Title of the application | Filing Date | Status |
|---|
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[patent_kind] => NA
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Array
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[patent_kind] => NA
[patent_issue_date] => 1995-12-12
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[firstpage_image] =>[orig_patent_app_number] => 227494
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Array
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[patent_doc_number] => 05654909
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-08-05
[patent_title] => '90-degree digital phase shift network and linearizer using all-pass digital filters'
[patent_app_type] => 1
[patent_app_number] => 8/220430
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Array
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[patent_issue_date] => 1995-07-18
[patent_title] => 'Method and apparatus for performing floating point arithmetic operation and rounding the result thereof'
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[patent_app_number] => 8/219560
[patent_app_country] => US
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Array
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[patent_doc_number] => 05615139
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-25
[patent_title] => 'Apparatus and method for synthesizing a sinusoidal signal'
[patent_app_type] => 1
[patent_app_number] => 8/217309
[patent_app_country] => US
[patent_app_date] => 1994-03-23
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[firstpage_image] =>[orig_patent_app_number] => 217309
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/217309 | Apparatus and method for synthesizing a sinusoidal signal | Mar 22, 1994 | Issued |
Array
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[id] => 3463945
[patent_doc_number] => 05452241
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-09-19
[patent_title] => 'System for optimizing argument reduction'
[patent_app_type] => 1
[patent_app_number] => 8/209589
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/209589 | System for optimizing argument reduction | Mar 13, 1994 | Issued |
| 08/205740 | DIGITAL SIGNAL PROCESSING OPERATION APPARATUS THAT ALLOWS COMBINED OPERATION | Mar 3, 1994 | Abandoned |
Array
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[id] => 4010367
[patent_doc_number] => 05923576
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[patent_kind] => NA
[patent_issue_date] => 1999-07-13
[patent_title] => 'Parallel recursive digital filters'
[patent_app_type] => 1
[patent_app_number] => 8/205812
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[firstpage_image] =>[orig_patent_app_number] => 205812
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/205812 | Parallel recursive digital filters | Mar 2, 1994 | Issued |
| 08/202529 | PROCESSES, APPARATUSES, AND SYSTEMS FOR ENCODING AND DECODING SIGNALS USING TRANSFORMS | Feb 27, 1994 | Abandoned |
Array
(
[id] => 3083976
[patent_doc_number] => 05365466
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-11-15
[patent_title] => 'Method for generating a random number in a system with portable electronic objects, and system for implementing the method'
[patent_app_type] => 1
[patent_app_number] => 8/194632
[patent_app_country] => US
[patent_app_date] => 1994-02-10
[patent_effective_date] => 0000-00-00
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[firstpage_image] =>[orig_patent_app_number] => 194632
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/194632 | Method for generating a random number in a system with portable electronic objects, and system for implementing the method | Feb 9, 1994 | Issued |
| 08/179827 | HIGH SPEED DIGITAL PARALLEL MULTIPLIER | Jan 10, 1994 | Abandoned |
Array
(
[id] => 3507407
[patent_doc_number] => 05532948
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-02
[patent_title] => 'Rank order filter'
[patent_app_type] => 1
[patent_app_number] => 8/177989
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[firstpage_image] =>[orig_patent_app_number] => 177989
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/177989 | Rank order filter | Jan 5, 1994 | Issued |
Array
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[id] => 3582329
[patent_doc_number] => 05539682
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-07-23
[patent_title] => 'Seed generation technique for iterative, convergent digital computations'
[patent_app_type] => 1
[patent_app_number] => 8/175497
[patent_app_country] => US
[patent_app_date] => 1993-12-30
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Array
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[id] => 3529782
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-06-25
[patent_title] => 'Method and apparatus for automatically designing logic circuit, and multiplier'
[patent_app_type] => 1
[patent_app_number] => 8/174450
[patent_app_country] => US
[patent_app_date] => 1993-12-28
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 08/174450 | Method and apparatus for automatically designing logic circuit, and multiplier | Dec 27, 1993 | Issued |
| 08/179829 | METHOD AND APPARATUS FOR PERFORMING PRESCALED DIVISION | Dec 21, 1993 | Abandoned |
Array
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Array
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[patent_issue_date] => 1996-05-14
[patent_title] => 'Data capture system with communicating and recharging docking apparatus and hand-held data terminal means cooperable therewith'
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Array
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[patent_kind] => NA
[patent_issue_date] => 1995-10-17
[patent_title] => 'Special functions arithmetic logic unit method and apparatus'
[patent_app_type] => 1
[patent_app_number] => 8/169269
[patent_app_country] => US
[patent_app_date] => 1993-12-20
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[firstpage_image] =>[orig_patent_app_number] => 169269
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/169269 | Special functions arithmetic logic unit method and apparatus | Dec 19, 1993 | Issued |
| 08/168846 | METHOD, APPARATUS, AND SYSTEM FOR TRANSFORMING SIGNALS | Dec 16, 1993 | Abandoned |
Array
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[id] => 3469286
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[patent_kind] => NA
[patent_issue_date] => 1995-01-17
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[firstpage_image] =>[orig_patent_app_number] => 164797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/164797 | Error correcting apparatus for image processing system | Dec 9, 1993 | Issued |