Search

Clare M. Perrin

Examiner (ID: 2155, Phone: (571)270-5952 , Office: P/1778 )

Most Active Art Unit
1778
Art Unit(s)
1778, 1779
Total Applications
805
Issued Applications
501
Pending Applications
90
Abandoned Applications
250

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 14366535 [patent_doc_number] => 10304579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-28 [patent_title] => PI-orbital semiconductor quantum cell [patent_app_type] => utility [patent_app_number] => 15/414698 [patent_app_country] => US [patent_app_date] => 2017-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2797 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15414698 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/414698
PI-orbital semiconductor quantum cell Jan 24, 2017 Issued
Array ( [id] => 10106958 [patent_doc_number] => 09142740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-22 [patent_title] => 'Optoelectronic element and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/886083 [patent_app_country] => US [patent_app_date] => 2013-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 55 [patent_no_of_words] => 11019 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13886083 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/886083
Optoelectronic element and manufacturing method thereof May 1, 2013 Issued
Array ( [id] => 7732623 [patent_doc_number] => 20120015500 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'Method of manufacturing wafer level package' [patent_app_type] => utility [patent_app_number] => 13/137984 [patent_app_country] => US [patent_app_date] => 2011-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3549 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015500.pdf [firstpage_image] =>[orig_patent_app_number] => 13137984 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/137984
Method of manufacturing wafer level package Sep 21, 2011 Issued
Array ( [id] => 8399817 [patent_doc_number] => 08270202 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Programming non-volatile storage element using current from other element' [patent_app_type] => utility [patent_app_number] => 13/154832 [patent_app_country] => US [patent_app_date] => 2011-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 37 [patent_no_of_words] => 13152 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13154832 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/154832
Programming non-volatile storage element using current from other element Jun 6, 2011 Issued
Array ( [id] => 8398909 [patent_doc_number] => 08269285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-18 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/098811 [patent_app_country] => US [patent_app_date] => 2011-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 32 [patent_no_of_words] => 16602 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13098811 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/098811
Semiconductor device May 1, 2011 Issued
Array ( [id] => 8749418 [patent_doc_number] => 08415251 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-09 [patent_title] => 'Electric component and component and method for the production thereof' [patent_app_type] => utility [patent_app_number] => 13/037918 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 3670 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13037918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/037918
Electric component and component and method for the production thereof Feb 28, 2011 Issued
Array ( [id] => 8421635 [patent_doc_number] => 08278123 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-02 [patent_title] => 'Ferromagnetic preferred grain growth promotion seed layer for amorphous or microcrystalline MgO tunnel barrier' [patent_app_type] => utility [patent_app_number] => 13/037796 [patent_app_country] => US [patent_app_date] => 2011-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 52 [patent_no_of_words] => 15025 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13037796 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/037796
Ferromagnetic preferred grain growth promotion seed layer for amorphous or microcrystalline MgO tunnel barrier Feb 28, 2011 Issued
Array ( [id] => 4469218 [patent_doc_number] => 07943415 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-05-17 [patent_title] => 'Methods of sputtering cadmium sulfide layers for use in cadmium telluride based thin film photovoltaic devices' [patent_app_type] => utility [patent_app_number] => 12/913390 [patent_app_country] => US [patent_app_date] => 2010-10-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5329 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/943/07943415.pdf [firstpage_image] =>[orig_patent_app_number] => 12913390 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/913390
Methods of sputtering cadmium sulfide layers for use in cadmium telluride based thin film photovoltaic devices Oct 26, 2010 Issued
Array ( [id] => 6397249 [patent_doc_number] => 20100304531 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-02 [patent_title] => 'Method of manufacturing layered chip package' [patent_app_type] => utility [patent_app_number] => 12/805446 [patent_app_country] => US [patent_app_date] => 2010-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 16846 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0304/20100304531.pdf [firstpage_image] =>[orig_patent_app_number] => 12805446 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/805446
Method of manufacturing layered chip package Jul 29, 2010 Issued
Array ( [id] => 8410689 [patent_doc_number] => 08274087 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-25 [patent_title] => 'Nitride semiconductor substrate and manufacturing method of the same' [patent_app_type] => utility [patent_app_number] => 12/619972 [patent_app_country] => US [patent_app_date] => 2009-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7690 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12619972 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/619972
Nitride semiconductor substrate and manufacturing method of the same Nov 16, 2009 Issued
Array ( [id] => 4477079 [patent_doc_number] => 07868383 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-01-11 [patent_title] => 'Configurable non-volatile logic structure for characterizing an integrated circuit device' [patent_app_type] => utility [patent_app_number] => 12/484076 [patent_app_country] => US [patent_app_date] => 2009-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 14498 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/868/07868383.pdf [firstpage_image] =>[orig_patent_app_number] => 12484076 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/484076
Configurable non-volatile logic structure for characterizing an integrated circuit device Jun 11, 2009 Issued
Array ( [id] => 5514932 [patent_doc_number] => 20090215239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-08-27 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/434655 [patent_app_country] => US [patent_app_date] => 2009-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7041 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0215/20090215239.pdf [firstpage_image] =>[orig_patent_app_number] => 12434655 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/434655
Method of manufacturing semiconductor device May 2, 2009 Issued
Array ( [id] => 8446141 [patent_doc_number] => 08288192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-16 [patent_title] => 'Method of manufacturing a capacitive electromechanical transducer' [patent_app_type] => utility [patent_app_number] => 12/918660 [patent_app_country] => US [patent_app_date] => 2009-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 46 [patent_no_of_words] => 10263 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12918660 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/918660
Method of manufacturing a capacitive electromechanical transducer Apr 27, 2009 Issued
Array ( [id] => 6286029 [patent_doc_number] => 20100237396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'DRAM Unit Cells, Capacitors, Methods Of Forming DRAM Unit Cells, And Methods Of Forming Capacitors' [patent_app_type] => utility [patent_app_number] => 12/409076 [patent_app_country] => US [patent_app_date] => 2009-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 48 [patent_no_of_words] => 8567 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20100237396.pdf [firstpage_image] =>[orig_patent_app_number] => 12409076 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/409076
DRAM unit cells, capacitors, methods of forming DRAM unit cells, and methods of forming capacitors Mar 22, 2009 Issued
Array ( [id] => 111655 [patent_doc_number] => 07718492 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-18 [patent_title] => 'Non-volatile memory cell circuit with programming through band-to-band tunneling and impact ionization gate current' [patent_app_type] => utility [patent_app_number] => 12/403333 [patent_app_country] => US [patent_app_date] => 2009-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 6997 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/718/07718492.pdf [firstpage_image] =>[orig_patent_app_number] => 12403333 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/403333
Non-volatile memory cell circuit with programming through band-to-band tunneling and impact ionization gate current Mar 11, 2009 Issued
Array ( [id] => 4518150 [patent_doc_number] => 07932610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-26 [patent_title] => 'Semiconductor integrated circuit having improved power supply wiring' [patent_app_type] => utility [patent_app_number] => 12/397883 [patent_app_country] => US [patent_app_date] => 2009-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 7040 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/932/07932610.pdf [firstpage_image] =>[orig_patent_app_number] => 12397883 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/397883
Semiconductor integrated circuit having improved power supply wiring Mar 3, 2009 Issued
Array ( [id] => 4500301 [patent_doc_number] => 07919416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-04-05 [patent_title] => 'Method of forming conformal dielectric film having Si-N bonds by PECVD' [patent_app_type] => utility [patent_app_number] => 12/357174 [patent_app_country] => US [patent_app_date] => 2009-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4613 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/919/07919416.pdf [firstpage_image] =>[orig_patent_app_number] => 12357174 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/357174
Method of forming conformal dielectric film having Si-N bonds by PECVD Jan 20, 2009 Issued
Array ( [id] => 8384963 [patent_doc_number] => 08262354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-09-11 [patent_title] => 'Method and apparatus for load measurement in a wind turbine' [patent_app_type] => utility [patent_app_number] => 12/198956 [patent_app_country] => US [patent_app_date] => 2008-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3685 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12198956 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/198956
Method and apparatus for load measurement in a wind turbine Aug 26, 2008 Issued
Array ( [id] => 4464 [patent_doc_number] => 07811925 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-10-12 [patent_title] => 'Capping before barrier-removal IC fabrication method' [patent_app_type] => utility [patent_app_number] => 12/184145 [patent_app_country] => US [patent_app_date] => 2008-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 9407 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/811/07811925.pdf [firstpage_image] =>[orig_patent_app_number] => 12184145 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/184145
Capping before barrier-removal IC fabrication method Jul 30, 2008 Issued
Array ( [id] => 5461756 [patent_doc_number] => 20090321956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'Layered chip package and method of manufacturing same' [patent_app_type] => utility [patent_app_number] => 12/216143 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 16816 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0321/20090321956.pdf [firstpage_image] =>[orig_patent_app_number] => 12216143 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/216143
Layered chip package and method of manufacturing same Jun 29, 2008 Issued
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