| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 2977114
[patent_doc_number] => 05265225
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-11-23
[patent_title] => 'Digital signal processing address sequencer'
[patent_app_type] => 1
[patent_app_number] => 7/482803
[patent_app_country] => US
[patent_app_date] => 1990-02-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2947
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 227
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/265/05265225.pdf
[firstpage_image] =>[orig_patent_app_number] => 482803
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/482803 | Digital signal processing address sequencer | Feb 20, 1990 | Issued |
Array
(
[id] => 2741681
[patent_doc_number] => 05040113
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-08-13
[patent_title] => 'Data manipulation program'
[patent_app_type] => 1
[patent_app_number] => 7/473091
[patent_app_country] => US
[patent_app_date] => 1990-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 2919
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 328
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/040/05040113.pdf
[firstpage_image] =>[orig_patent_app_number] => 473091
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/473091 | Data manipulation program | Jan 30, 1990 | Issued |
| 07/463813 | ELECTRONIC DICTIONARY | Jan 15, 1990 | Abandoned |
Array
(
[id] => 2796391
[patent_doc_number] => 05093909
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-03-03
[patent_title] => 'Single-chip microcomputer including an EPROM capable of accommodating different memory capacities by address boundary discrimination'
[patent_app_type] => 1
[patent_app_number] => 7/450314
[patent_app_country] => US
[patent_app_date] => 1989-12-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4063
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/093/05093909.pdf
[firstpage_image] =>[orig_patent_app_number] => 450314
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/450314 | Single-chip microcomputer including an EPROM capable of accommodating different memory capacities by address boundary discrimination | Dec 13, 1989 | Issued |
| 07/453140 | DATA PROCESSING DEVICE WITH TIME-MULTIPLEXED MEMORY BUS | Dec 11, 1989 | Abandoned |
Array
(
[id] => 2605922
[patent_doc_number] => 04965722
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-10-23
[patent_title] => 'Dynamic memory refresh circuit with a flexible refresh delay dynamic memory'
[patent_app_type] => 1
[patent_app_number] => 7/441577
[patent_app_country] => US
[patent_app_date] => 1989-11-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 8
[patent_no_of_words] => 5919
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 352
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/965/04965722.pdf
[firstpage_image] =>[orig_patent_app_number] => 441577
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/441577 | Dynamic memory refresh circuit with a flexible refresh delay dynamic memory | Nov 26, 1989 | Issued |
Array
(
[id] => 2716532
[patent_doc_number] => 05062034
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1991-10-29
[patent_title] => 'Device for emulating a microcontroller using a parent bond-out microcontroller and a derivative non-bond-out microcontroller'
[patent_app_type] => 1
[patent_app_number] => 7/440455
[patent_app_country] => US
[patent_app_date] => 1989-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 8
[patent_no_of_words] => 6079
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 389
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/062/05062034.pdf
[firstpage_image] =>[orig_patent_app_number] => 440455
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/440455 | Device for emulating a microcontroller using a parent bond-out microcontroller and a derivative non-bond-out microcontroller | Nov 19, 1989 | Issued |
Array
(
[id] => 2948472
[patent_doc_number] => 05247655
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-21
[patent_title] => 'Sleep mode refresh apparatus'
[patent_app_type] => 1
[patent_app_number] => 7/432680
[patent_app_country] => US
[patent_app_date] => 1989-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 2163
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/247/05247655.pdf
[firstpage_image] =>[orig_patent_app_number] => 432680
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/432680 | Sleep mode refresh apparatus | Nov 6, 1989 | Issued |
Array
(
[id] => 2906818
[patent_doc_number] => 05271098
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-12-14
[patent_title] => 'Method and apparatus for use of expanded memory system (EMS) to access cartridge memory'
[patent_app_type] => 1
[patent_app_number] => 7/432681
[patent_app_country] => US
[patent_app_date] => 1989-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1798
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/271/05271098.pdf
[firstpage_image] =>[orig_patent_app_number] => 432681
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/432681 | Method and apparatus for use of expanded memory system (EMS) to access cartridge memory | Nov 6, 1989 | Issued |
Array
(
[id] => 2835943
[patent_doc_number] => 05170477
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1992-12-08
[patent_title] => 'Odd boundary address aligned direct memory acess device and method'
[patent_app_type] => 1
[patent_app_number] => 7/430693
[patent_app_country] => US
[patent_app_date] => 1989-10-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 27
[patent_no_of_words] => 7533
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 606
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/170/05170477.pdf
[firstpage_image] =>[orig_patent_app_number] => 430693
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/430693 | Odd boundary address aligned direct memory acess device and method | Oct 30, 1989 | Issued |
| 07/427939 | GENERAL INTERFACE FOR DIVERSE PROGRAMS IN DIGITAL DATA PROCESSING SYSTEM | Oct 24, 1989 | Abandoned |
| 07/416680 | BURST ACCESS MEMORY | Oct 2, 1989 | Abandoned |
Array
(
[id] => 2946876
[patent_doc_number] => 05197145
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-03-23
[patent_title] => 'Buffer storage system using parallel buffer storage units and move-out buffer registers'
[patent_app_type] => 1
[patent_app_number] => 7/409711
[patent_app_country] => US
[patent_app_date] => 1989-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6428
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/197/05197145.pdf
[firstpage_image] =>[orig_patent_app_number] => 409711
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/409711 | Buffer storage system using parallel buffer storage units and move-out buffer registers | Sep 19, 1989 | Issued |
Array
(
[id] => 2991886
[patent_doc_number] => 05204965
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-04-20
[patent_title] => 'Data processing system using stream stores'
[patent_app_type] => 1
[patent_app_number] => 7/409969
[patent_app_country] => US
[patent_app_date] => 1989-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 11978
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/204/05204965.pdf
[firstpage_image] =>[orig_patent_app_number] => 409969
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/409969 | Data processing system using stream stores | Sep 18, 1989 | Issued |
| 07/405636 | ENHANCED VMEBUS PROTOCOL UTILIZING PSEUDOSYNCHRONOUS HANDSHAKING AND BLOCK MODE DATA TRANSFER | Sep 7, 1989 | Abandoned |
| 07/388755 | MACHINE TRANSLATION SYSTEM | Aug 2, 1989 | Abandoned |
Array
(
[id] => 2611986
[patent_doc_number] => 04949249
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1990-08-14
[patent_title] => 'Clock skew avoidance technique for pipeline processors'
[patent_app_type] => 1
[patent_app_number] => 7/390471
[patent_app_country] => US
[patent_app_date] => 1989-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 5
[patent_no_of_words] => 3541
[patent_no_of_claims] => 2
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/04/949/04949249.pdf
[firstpage_image] =>[orig_patent_app_number] => 390471
[rel_patent_id] =>[rel_patent_doc_number] =>) 07/390471 | Clock skew avoidance technique for pipeline processors | Aug 2, 1989 | Issued |
| 07/389928 | FILE ALTERATION MONITOR FOR COMPUTER OPERATING AND FILE MANAGEMENT SYSTEMS | Jul 31, 1989 | Abandoned |
| 07/382513 | METHOD FOR VERIFICATION AND RESTORATION OF DIRECTORIES AND MAPS IN CPU SYSTEM-MANAGED STORE | Jul 18, 1989 | Abandoned |
| 07/381130 | METHOD FOR PROTECTING CIRCUIT CONFIGURATIONS HAVING AN ELECTRICALLY PROGRAMMABLE NON-VOLATILE MEMORY USED AS A COUNTER FROM BOUNDARY- VALUE AMBIGUOUS PROGRAMMING OF THE MEMORY AND A CIRCUIT CONFIGURATION FOR PERFORMING THE METHOD | Jul 13, 1989 | Abandoned |