Search

Clayton E. Laballe

Examiner (ID: 13914)

Most Active Art Unit
2102
Art Unit(s)
2862, 3621, 2102, 2834, 2852, 1106
Total Applications
921
Issued Applications
755
Pending Applications
35
Abandoned Applications
130

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2742705 [patent_doc_number] => 05051892 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-24 [patent_title] => 'Full duplex conversation between transaction programs' [patent_app_type] => 1 [patent_app_number] => 7/308292 [patent_app_country] => US [patent_app_date] => 1989-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4779 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 307 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/051/05051892.pdf [firstpage_image] =>[orig_patent_app_number] => 308292 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/308292
Full duplex conversation between transaction programs Feb 8, 1989 Issued
07/306776 SCHEME FOR INSURING DATA CONSISTENCY BETWEEN A PLURALITY OF CACHE MEMORIES AND THE MAIN MEMORY IN A MULTI-PROCESSOR COMPUTER SYSTEM Feb 2, 1989 Abandoned
Array ( [id] => 2815605 [patent_doc_number] => 05115496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-19 [patent_title] => 'Queue device capable of quickly transferring a digital signal unit of a word length different from a single word length' [patent_app_type] => 1 [patent_app_number] => 7/301089 [patent_app_country] => US [patent_app_date] => 1989-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 6769 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/115/05115496.pdf [firstpage_image] =>[orig_patent_app_number] => 301089 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/301089
Queue device capable of quickly transferring a digital signal unit of a word length different from a single word length Jan 24, 1989 Issued
07/301404 TRIPLE PORT FOR CACHE MEMORY Jan 23, 1989 Abandoned
Array ( [id] => 2605768 [patent_doc_number] => 04965715 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-10-23 [patent_title] => 'Data flow type information processor' [patent_app_type] => 1 [patent_app_number] => 7/299610 [patent_app_country] => US [patent_app_date] => 1989-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5940 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/965/04965715.pdf [firstpage_image] =>[orig_patent_app_number] => 299610 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/299610
Data flow type information processor Jan 22, 1989 Issued
Array ( [id] => 2891914 [patent_doc_number] => 05119486 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-02 [patent_title] => 'Memory board selection method and apparatus' [patent_app_type] => 1 [patent_app_number] => 7/297389 [patent_app_country] => US [patent_app_date] => 1989-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7785 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/119/05119486.pdf [firstpage_image] =>[orig_patent_app_number] => 297389 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297389
Memory board selection method and apparatus Jan 16, 1989 Issued
Array ( [id] => 2753415 [patent_doc_number] => 04987535 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-01-22 [patent_title] => 'Interruption control circuit' [patent_app_type] => 1 [patent_app_number] => 7/298289 [patent_app_country] => US [patent_app_date] => 1989-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2300 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 370 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/987/04987535.pdf [firstpage_image] =>[orig_patent_app_number] => 298289 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/298289
Interruption control circuit Jan 16, 1989 Issued
Array ( [id] => 2676827 [patent_doc_number] => 05070479 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-12-03 [patent_title] => 'External memory having an authenticating processor and method of operating same' [patent_app_type] => 1 [patent_app_number] => 7/297105 [patent_app_country] => US [patent_app_date] => 1989-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 14 [patent_no_of_words] => 5998 [patent_no_of_claims] => 64 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/070/05070479.pdf [firstpage_image] =>[orig_patent_app_number] => 297105 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297105
External memory having an authenticating processor and method of operating same Jan 12, 1989 Issued
07/297779 INPUT/OUTPUT CACHE CONTROLLER WITH ACCESS PROTECTION Jan 12, 1989 Abandoned
Array ( [id] => 2892457 [patent_doc_number] => 05109490 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-04-28 [patent_title] => 'Data transfer using bus address lines' [patent_app_type] => 1 [patent_app_number] => 7/297772 [patent_app_country] => US [patent_app_date] => 1989-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 6681 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/109/05109490.pdf [firstpage_image] =>[orig_patent_app_number] => 297772 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/297772
Data transfer using bus address lines Jan 12, 1989 Issued
Array ( [id] => 2798958 [patent_doc_number] => 05155810 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-10-13 [patent_title] => 'Dual FIFO peripheral with combinatorial logic circuitry' [patent_app_type] => 1 [patent_app_number] => 7/295683 [patent_app_country] => US [patent_app_date] => 1989-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3764 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/155/05155810.pdf [firstpage_image] =>[orig_patent_app_number] => 295683 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/295683
Dual FIFO peripheral with combinatorial logic circuitry Jan 9, 1989 Issued
07/294334 WAIT DEPTH LIMITED CONCURRENCY CONTROL METHOD Jan 4, 1989 Abandoned
Array ( [id] => 2594455 [patent_doc_number] => 04926324 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-05-15 [patent_title] => 'I/O control system and method' [patent_app_type] => 1 [patent_app_number] => 7/293555 [patent_app_country] => US [patent_app_date] => 1989-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 8826 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/926/04926324.pdf [firstpage_image] =>[orig_patent_app_number] => 293555 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/293555
I/O control system and method Jan 4, 1989 Issued
Array ( [id] => 2757459 [patent_doc_number] => 05031089 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-07-09 [patent_title] => 'Dynamic resource allocation scheme for distributed heterogeneous computer systems' [patent_app_type] => 1 [patent_app_number] => 7/292124 [patent_app_country] => US [patent_app_date] => 1988-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 5707 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/031/05031089.pdf [firstpage_image] =>[orig_patent_app_number] => 292124 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/292124
Dynamic resource allocation scheme for distributed heterogeneous computer systems Dec 29, 1988 Issued
07/289485 ELECTRONIC DICTIONARY AND METHOD OF COPIFYING WORDS THEREFOR Dec 20, 1988 Abandoned
Array ( [id] => 2678682 [patent_doc_number] => 05047918 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1991-09-10 [patent_title] => 'File management system' [patent_app_type] => 1 [patent_app_number] => 7/289395 [patent_app_country] => US [patent_app_date] => 1988-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 14055 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 284 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/047/05047918.pdf [firstpage_image] =>[orig_patent_app_number] => 289395 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/289395
File management system Dec 18, 1988 Issued
07/283268 POWER-UP RESET CONDITIONED ON DIRECTION OF VOLTAGE CHANGE Dec 8, 1988 Abandoned
Array ( [id] => 2667148 [patent_doc_number] => 04979101 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-12-18 [patent_title] => 'Apparatus for retrieving character strings' [patent_app_type] => 1 [patent_app_number] => 7/279249 [patent_app_country] => US [patent_app_date] => 1988-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3317 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 504 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/979/04979101.pdf [firstpage_image] =>[orig_patent_app_number] => 279249 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/279249
Apparatus for retrieving character strings Nov 30, 1988 Issued
07/277263 OPERAND ADDRESS MODIFICATION SYSTEM Nov 28, 1988 Abandoned
07/270379 WORD PROCESSOR Nov 9, 1988 Abandoned
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