Search

Clemence S. Han

Examiner (ID: 7905, Phone: (571)272-3158 , Office: P/2414 )

Most Active Art Unit
2414
Art Unit(s)
2414, 2665, 2464, 2416, 2668, 2616
Total Applications
1516
Issued Applications
1308
Pending Applications
106
Abandoned Applications
135

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20311728 [patent_doc_number] => 20250329357 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => MEMORY SYSTEM AND MEMORY OPERATION METHOD [patent_app_type] => utility [patent_app_number] => 18/884372 [patent_app_country] => US [patent_app_date] => 2024-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18884372 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/884372
MEMORY SYSTEM AND MEMORY OPERATION METHOD Sep 12, 2024 Pending
Array ( [id] => 20096095 [patent_doc_number] => 20250226031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/829771 [patent_app_country] => US [patent_app_date] => 2024-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7429 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18829771 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/829771
SEMICONDUCTOR MEMORY DEVICE Sep 9, 2024 Pending
Array ( [id] => 20252796 [patent_doc_number] => 20250301665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/824795 [patent_app_country] => US [patent_app_date] => 2024-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18824795 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/824795
STORAGE DEVICE Sep 3, 2024 Pending
Array ( [id] => 19788272 [patent_doc_number] => 20250061951 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => CONTROL GATE VOLTAGE GENERATING CIRCUIT FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/795606 [patent_app_country] => US [patent_app_date] => 2024-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 376 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18795606 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/795606
CONTROL GATE VOLTAGE GENERATING CIRCUIT FOR NON-VOLATILE MEMORY Aug 5, 2024 Pending
Array ( [id] => 19589391 [patent_doc_number] => 20240386948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => MEMORY DEVICE HAVING A COMPARATOR CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/789140 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7856 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789140 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789140
MEMORY DEVICE HAVING A COMPARATOR CIRCUIT Jul 29, 2024 Pending
Array ( [id] => 20501683 [patent_doc_number] => 20260031145 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-01-29 [patent_title] => Content-Addressable Memory (CAM) Cell with P and N Pass Gates to Same Write Bit Line [patent_app_type] => utility [patent_app_number] => 18/780884 [patent_app_country] => US [patent_app_date] => 2024-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3768 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 340 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18780884 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/780884
Content-Addressable Memory (CAM) Cell with P and N Pass Gates to Same Write Bit Line Jul 22, 2024 Pending
Array ( [id] => 19661785 [patent_doc_number] => 20240428850 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-26 [patent_title] => Dynamic Adjustment of Word Line Timing in Static Dynamic Random Access Memory [patent_app_type] => utility [patent_app_number] => 18/772274 [patent_app_country] => US [patent_app_date] => 2024-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4717 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772274 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/772274
Dynamic Adjustment of Word Line Timing in Static Dynamic Random Access Memory Jul 14, 2024 Pending
Array ( [id] => 19548653 [patent_doc_number] => 20240365689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => MEMORY DEVICE, MEMORY ARRAY, AND N-BIT MEMORY UNIT [patent_app_type] => utility [patent_app_number] => 18/764340 [patent_app_country] => US [patent_app_date] => 2024-07-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6231 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18764340 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/764340
MEMORY DEVICE, MEMORY ARRAY, AND N-BIT MEMORY UNIT Jul 3, 2024 Pending
Array ( [id] => 20028499 [patent_doc_number] => 20250166721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => NONVOLATILE MEMORY DEVICE, STORAGE DEVICE HAVING THE SAME, AND TESTING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/761985 [patent_app_country] => US [patent_app_date] => 2024-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7250 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18761985 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/761985
NONVOLATILE MEMORY DEVICE, STORAGE DEVICE HAVING THE SAME, AND TESTING METHOD THEREOF Jul 1, 2024 Pending
Array ( [id] => 19750185 [patent_doc_number] => 20250038750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-30 [patent_title] => DELAY LOCKED LOOP AND SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/756555 [patent_app_country] => US [patent_app_date] => 2024-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5331 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18756555 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/756555
DELAY LOCKED LOOP AND SEMICONDUCTOR MEMORY DEVICE Jun 26, 2024 Pending
Array ( [id] => 19820702 [patent_doc_number] => 20250078909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => APPARATUS FOR SMALL SWING DATA TRANSFER [patent_app_type] => utility [patent_app_number] => 18/747986 [patent_app_country] => US [patent_app_date] => 2024-06-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9495 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18747986 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/747986
APPARATUS FOR SMALL SWING DATA TRANSFER Jun 18, 2024 Pending
Array ( [id] => 19726917 [patent_doc_number] => 20250029668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-23 [patent_title] => DISTRIBUTED POWER SUPPLY SWITCHING CIRCUIT FOR EFUSE MEMORY [patent_app_type] => utility [patent_app_number] => 18/744504 [patent_app_country] => US [patent_app_date] => 2024-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3161 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 176 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18744504 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/744504
DISTRIBUTED POWER SUPPLY SWITCHING CIRCUIT FOR EFUSE MEMORY Jun 13, 2024 Pending
Array ( [id] => 20283355 [patent_doc_number] => 20250308597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => PROGRAMMING VOLTAGE SUPPLY AND PROGRAMMING VOLTAGE GENERATING METHOD [patent_app_type] => utility [patent_app_number] => 18/741805 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18741805 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/741805
Programming voltage supply and programming voltage generating method Jun 12, 2024 Issued
Array ( [id] => 19604429 [patent_doc_number] => 20240395309 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => Methods and Circuits for Power Management of a Memory Module [patent_app_type] => utility [patent_app_number] => 18/734655 [patent_app_country] => US [patent_app_date] => 2024-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2549 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18734655 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/734655
Methods and Circuits for Power Management of a Memory Module Jun 4, 2024 Pending
Array ( [id] => 19452402 [patent_doc_number] => 20240312532 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/672202 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672202 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672202
SEMICONDUCTOR DEVICE May 22, 2024 Pending
Array ( [id] => 19850384 [patent_doc_number] => 20250095735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => INTEGRATED CIRCUIT INCLUDING TERNARY CONTENT ADDRESSABLE MEMORY CELL [patent_app_type] => utility [patent_app_number] => 18/664549 [patent_app_country] => US [patent_app_date] => 2024-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664549 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/664549
INTEGRATED CIRCUIT INCLUDING TERNARY CONTENT ADDRESSABLE MEMORY CELL May 14, 2024 Pending
Array ( [id] => 19392476 [patent_doc_number] => 20240282346 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 18/654527 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8239 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654527 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654527
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM HAVING THE SAME May 2, 2024 Pending
Array ( [id] => 19420757 [patent_doc_number] => 20240296881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => Semiconductor Device and Method for Driving Semiconductor Device [patent_app_type] => utility [patent_app_number] => 18/646415 [patent_app_country] => US [patent_app_date] => 2024-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 36767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 331 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18646415 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/646415
Semiconductor Device and Method for Driving Semiconductor Device Apr 24, 2024 Pending
Array ( [id] => 19347211 [patent_doc_number] => 20240256174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => READ/WRITE SWITCHING CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/631228 [patent_app_country] => US [patent_app_date] => 2024-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9285 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18631228 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/631228
READ/WRITE SWITCHING CIRCUIT AND MEMORY Apr 9, 2024 Pending
Array ( [id] => 19384319 [patent_doc_number] => 20240274189 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-15 [patent_title] => SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENTIAL THRESHOLD VOLTAGES [patent_app_type] => utility [patent_app_number] => 18/628284 [patent_app_country] => US [patent_app_date] => 2024-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6050 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18628284 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/628284
SEMICONDUCTOR MEMORY DEVICES WITH DIFFERENTIAL THRESHOLD VOLTAGES Apr 4, 2024 Pending
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