
Clifford H. Knoll
Examiner (ID: 1011)
| Most Active Art Unit | 2111 |
| Art Unit(s) | 2308, 2111, 2112 |
| Total Applications | 533 |
| Issued Applications | 412 |
| Pending Applications | 3 |
| Abandoned Applications | 120 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 340173
[patent_doc_number] => 07506094
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-03-17
[patent_title] => 'Method using a master node to control I/O fabric configuration in a multi-host environment'
[patent_app_type] => utility
[patent_app_number] => 12/136009
[patent_app_country] => US
[patent_app_date] => 2008-06-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 4872
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 260
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/506/07506094.pdf
[firstpage_image] =>[orig_patent_app_number] => 12136009
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/136009 | Method using a master node to control I/O fabric configuration in a multi-host environment | Jun 8, 2008 | Issued |
Array
(
[id] => 5305742
[patent_doc_number] => 20090300394
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'Reducing Power Consumption During Execution Of An Application On A Plurality Of Compute Nodes'
[patent_app_type] => utility
[patent_app_number] => 12/129319
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9050
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0300/20090300394.pdf
[firstpage_image] =>[orig_patent_app_number] => 12129319
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/129319 | Reducing power consumption during execution of an application on a plurality of compute nodes | May 28, 2008 | Issued |
Array
(
[id] => 5305733
[patent_doc_number] => 20090300385
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-12-03
[patent_title] => 'Reducing Power Consumption While Synchronizing A Plurality Of Compute Nodes During Execution Of A Parallel Application'
[patent_app_type] => utility
[patent_app_number] => 12/129223
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 9756
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0300/20090300385.pdf
[firstpage_image] =>[orig_patent_app_number] => 12129223
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/129223 | Reducing power consumption while synchronizing a plurality of compute nodes during execution of a parallel application | May 28, 2008 | Issued |
Array
(
[id] => 7753070
[patent_doc_number] => 08111092
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-07
[patent_title] => 'Register with process, supply voltage and temperature variation independent propagation delay path'
[patent_app_type] => utility
[patent_app_number] => 12/129064
[patent_app_country] => US
[patent_app_date] => 2008-05-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 4
[patent_no_of_words] => 2445
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 256
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/111/08111092.pdf
[firstpage_image] =>[orig_patent_app_number] => 12129064
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/129064 | Register with process, supply voltage and temperature variation independent propagation delay path | May 28, 2008 | Issued |
Array
(
[id] => 7803751
[patent_doc_number] => 08132035
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-06
[patent_title] => 'Ethernet interface'
[patent_app_type] => utility
[patent_app_number] => 12/127773
[patent_app_country] => US
[patent_app_date] => 2008-05-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 6
[patent_no_of_words] => 6230
[patent_no_of_claims] => 32
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/132/08132035.pdf
[firstpage_image] =>[orig_patent_app_number] => 12127773
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/127773 | Ethernet interface | May 26, 2008 | Issued |
Array
(
[id] => 4589584
[patent_doc_number] => 07831759
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-09
[patent_title] => 'Method, apparatus, and computer program product for routing packets utilizing a unique identifier, included within a standard address, that identifies the destination host computer system'
[patent_app_type] => utility
[patent_app_number] => 12/113793
[patent_app_country] => US
[patent_app_date] => 2008-05-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 6627
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/831/07831759.pdf
[firstpage_image] =>[orig_patent_app_number] => 12113793
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/113793 | Method, apparatus, and computer program product for routing packets utilizing a unique identifier, included within a standard address, that identifies the destination host computer system | Apr 30, 2008 | Issued |
Array
(
[id] => 5311987
[patent_doc_number] => 20090019268
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-01-15
[patent_title] => 'PROCESSOR'
[patent_app_type] => utility
[patent_app_number] => 12/053023
[patent_app_country] => US
[patent_app_date] => 2008-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 11393
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0019/20090019268.pdf
[firstpage_image] =>[orig_patent_app_number] => 12053023
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/053023 | PROCESSOR | Mar 20, 2008 | Abandoned |
Array
(
[id] => 5535214
[patent_doc_number] => 20090235002
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-09-17
[patent_title] => 'Deadlock Prevention in a Computing Environment'
[patent_app_type] => utility
[patent_app_number] => 12/049399
[patent_app_country] => US
[patent_app_date] => 2008-03-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 3566
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0235/20090235002.pdf
[firstpage_image] =>[orig_patent_app_number] => 12049399
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/049399 | Deadlock prevention in a computing environment | Mar 16, 2008 | Issued |
Array
(
[id] => 4754695
[patent_doc_number] => 20080162771
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-03
[patent_title] => 'BUS ARBITRATION SYSTEM'
[patent_app_type] => utility
[patent_app_number] => 12/048772
[patent_app_country] => US
[patent_app_date] => 2008-03-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 5311
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0162/20080162771.pdf
[firstpage_image] =>[orig_patent_app_number] => 12048772
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/048772 | Bus arbitration system | Mar 13, 2008 | Issued |
Array
(
[id] => 7495137
[patent_doc_number] => 08032774
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-10-04
[patent_title] => 'Information processing apparatus'
[patent_app_type] => utility
[patent_app_number] => 12/046748
[patent_app_country] => US
[patent_app_date] => 2008-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 10904
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 307
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/032/08032774.pdf
[firstpage_image] =>[orig_patent_app_number] => 12046748
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/046748 | Information processing apparatus | Mar 11, 2008 | Issued |
Array
(
[id] => 7525015
[patent_doc_number] => 08028185
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-09-27
[patent_title] => 'Protocol for transitioning in and out of zero-power state'
[patent_app_type] => utility
[patent_app_number] => 12/045764
[patent_app_country] => US
[patent_app_date] => 2008-03-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 6561
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/028/08028185.pdf
[firstpage_image] =>[orig_patent_app_number] => 12045764
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/045764 | Protocol for transitioning in and out of zero-power state | Mar 10, 2008 | Issued |
Array
(
[id] => 223396
[patent_doc_number] => 07610430
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-10-27
[patent_title] => 'System and method for memory hub-based expansion bus'
[patent_app_type] => utility
[patent_app_number] => 12/075424
[patent_app_country] => US
[patent_app_date] => 2008-03-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5462
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/610/07610430.pdf
[firstpage_image] =>[orig_patent_app_number] => 12075424
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/075424 | System and method for memory hub-based expansion bus | Mar 9, 2008 | Issued |
Array
(
[id] => 7746419
[patent_doc_number] => 08108694
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-01-31
[patent_title] => 'Apparatus, system and method for supplying a portable electronic device by combining a plurality of I/O ports belonging to at least one other electronic device'
[patent_app_type] => utility
[patent_app_number] => 12/044118
[patent_app_country] => US
[patent_app_date] => 2008-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 15
[patent_no_of_words] => 6696
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/108/08108694.pdf
[firstpage_image] =>[orig_patent_app_number] => 12044118
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/044118 | Apparatus, system and method for supplying a portable electronic device by combining a plurality of I/O ports belonging to at least one other electronic device | Mar 6, 2008 | Issued |
Array
(
[id] => 4865588
[patent_doc_number] => 20080144647
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-19
[patent_title] => 'Method And Apparatus For A Two-Wire Serial Command Bus Interface'
[patent_app_type] => utility
[patent_app_number] => 12/039597
[patent_app_country] => US
[patent_app_date] => 2008-02-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 3457
[patent_no_of_claims] => 38
[patent_no_of_ind_claims] => 10
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0144/20080144647.pdf
[firstpage_image] =>[orig_patent_app_number] => 12039597
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/039597 | Method And Apparatus For A Two-Wire Serial Command Bus Interface | Feb 27, 2008 | Abandoned |
Array
(
[id] => 6371239
[patent_doc_number] => 20100315135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-16
[patent_title] => 'Redriver With Two Reference Clocks And Method Of Operation Thereof'
[patent_app_type] => utility
[patent_app_number] => 12/918050
[patent_app_country] => US
[patent_app_date] => 2008-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 4640
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0315/20100315135.pdf
[firstpage_image] =>[orig_patent_app_number] => 12918050
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/918050 | Redriver with two reference clocks and method of operation thereof | Feb 19, 2008 | Issued |
Array
(
[id] => 6262443
[patent_doc_number] => 20100030936
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-04
[patent_title] => 'INTEGRATED CIRCUIT AND ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/526768
[patent_app_country] => US
[patent_app_date] => 2008-02-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4374
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0030/20100030936.pdf
[firstpage_image] =>[orig_patent_app_number] => 12526768
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/526768 | Integrated circuit and electronic device | Feb 12, 2008 | Issued |
Array
(
[id] => 4956435
[patent_doc_number] => 20080189459
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-07
[patent_title] => 'Serial communication system'
[patent_app_type] => utility
[patent_app_number] => 12/011586
[patent_app_country] => US
[patent_app_date] => 2008-01-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 3928
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0189/20080189459.pdf
[firstpage_image] =>[orig_patent_app_number] => 12011586
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/011586 | Serial communication system using an I2C bus as a serial bus | Jan 27, 2008 | Issued |
Array
(
[id] => 68819
[patent_doc_number] => 07761633
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-07-20
[patent_title] => 'Addressable serial peripheral interface'
[patent_app_type] => utility
[patent_app_number] => 12/018863
[patent_app_country] => US
[patent_app_date] => 2008-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 15494
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 221
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/761/07761633.pdf
[firstpage_image] =>[orig_patent_app_number] => 12018863
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/018863 | Addressable serial peripheral interface | Jan 23, 2008 | Issued |
Array
(
[id] => 4522674
[patent_doc_number] => 07917783
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-03-29
[patent_title] => 'Power switch device'
[patent_app_type] => utility
[patent_app_number] => 12/009702
[patent_app_country] => US
[patent_app_date] => 2008-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2569
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/917/07917783.pdf
[firstpage_image] =>[orig_patent_app_number] => 12009702
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/009702 | Power switch device | Jan 21, 2008 | Issued |
Array
(
[id] => 288423
[patent_doc_number] => 07552264
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-23
[patent_title] => 'Adapter unit for a personal digital assistant having automatically configurable application buttons'
[patent_app_type] => utility
[patent_app_number] => 12/016721
[patent_app_country] => US
[patent_app_date] => 2008-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 33
[patent_no_of_words] => 4958
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/552/07552264.pdf
[firstpage_image] =>[orig_patent_app_number] => 12016721
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/016721 | Adapter unit for a personal digital assistant having automatically configurable application buttons | Jan 17, 2008 | Issued |