Search

Colleen Erin Snow

Examiner (ID: 16708, Phone: (571)272-8603 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2813, 2899
Total Applications
846
Issued Applications
638
Pending Applications
51
Abandoned Applications
177

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7577182 [patent_doc_number] => 20110291064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-12-01 [patent_title] => 'RESISTANCE VARIABLE MEMORY CELL STRUCTURES AND METHODS' [patent_app_type] => utility [patent_app_number] => 12/787018 [patent_app_country] => US [patent_app_date] => 2010-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3064 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0291/20110291064.pdf [firstpage_image] =>[orig_patent_app_number] => 12787018 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/787018
Resistance variable memory cell structures and methods May 24, 2010 Issued
Array ( [id] => 7515761 [patent_doc_number] => 08039833 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-18 [patent_title] => 'Polythiophenes and devices thereof' [patent_app_type] => utility [patent_app_number] => 12/783595 [patent_app_country] => US [patent_app_date] => 2010-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6556 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/039/08039833.pdf [firstpage_image] =>[orig_patent_app_number] => 12783595 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/783595
Polythiophenes and devices thereof May 19, 2010 Issued
Array ( [id] => 7702905 [patent_doc_number] => 08088659 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-01-03 [patent_title] => 'Method of forming capacitors' [patent_app_type] => utility [patent_app_number] => 12/769306 [patent_app_country] => US [patent_app_date] => 2010-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3064 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/088/08088659.pdf [firstpage_image] =>[orig_patent_app_number] => 12769306 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/769306
Method of forming capacitors Apr 27, 2010 Issued
Array ( [id] => 6137357 [patent_doc_number] => 20110127585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'LATERAL JUNCTION FIELD-EFFECT TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 13/056071 [patent_app_country] => US [patent_app_date] => 2010-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7062 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20110127585.pdf [firstpage_image] =>[orig_patent_app_number] => 13056071 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/056071
LATERAL JUNCTION FIELD-EFFECT TRANSISTOR Mar 25, 2010 Abandoned
Array ( [id] => 6604315 [patent_doc_number] => 20100171114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-07-08 [patent_title] => 'METHOD OF FORMING A CROSSED WIRE MOLECULAR DEVICE INCLUDING A SELF-ASSEMBLED MOLECULAR LAYER' [patent_app_type] => utility [patent_app_number] => 12/727065 [patent_app_country] => US [patent_app_date] => 2010-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4134 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0171/20100171114.pdf [firstpage_image] =>[orig_patent_app_number] => 12727065 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/727065
Method of forming a crossed wire molecular device including a self-assembled molecular layer Mar 17, 2010 Issued
Array ( [id] => 6518739 [patent_doc_number] => 20100230767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'MEMS SENSOR, MEMS SENSOR MANUFACTURING METHOD, AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/721026 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 55 [patent_figures_cnt] => 55 [patent_no_of_words] => 12938 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20100230767.pdf [firstpage_image] =>[orig_patent_app_number] => 12721026 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721026
MEMS SENSOR, MEMS SENSOR MANUFACTURING METHOD, AND ELECTRONIC DEVICE Mar 9, 2010 Abandoned
Array ( [id] => 9020348 [patent_doc_number] => 08530333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 12/721298 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 37 [patent_no_of_words] => 13186 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12721298 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721298
Semiconductor device and manufacturing method thereof Mar 9, 2010 Issued
Array ( [id] => 6010598 [patent_doc_number] => 20110220995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'Semiconductor Device Having Multi-Thickness Gate Dielectric' [patent_app_type] => utility [patent_app_number] => 12/721045 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20110220995.pdf [firstpage_image] =>[orig_patent_app_number] => 12721045 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721045
Semiconductor device having multi-thickness gate dielectric Mar 9, 2010 Issued
Array ( [id] => 6320768 [patent_doc_number] => 20100244104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'COMPOUND SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/721052 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244104.pdf [firstpage_image] =>[orig_patent_app_number] => 12721052 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721052
Compound semiconductor device and manufacturing method thereof Mar 9, 2010 Issued
Array ( [id] => 6010597 [patent_doc_number] => 20110220994 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'Method of Forming a DRAM Array of Devices with Vertically Integrated Recessed Access Device and Digitline' [patent_app_type] => utility [patent_app_number] => 12/721373 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 3567 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20110220994.pdf [firstpage_image] =>[orig_patent_app_number] => 12721373 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721373
Method of forming a DRAM array of devices with vertically integrated recessed access device and digitline Mar 9, 2010 Issued
Array ( [id] => 6199718 [patent_doc_number] => 20110062504 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-17 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE INCLUDING FERROELECTRIC CAPACITOR' [patent_app_type] => utility [patent_app_number] => 12/721245 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 6059 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20110062504.pdf [firstpage_image] =>[orig_patent_app_number] => 12721245 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721245
Semiconductor memory device including ferroelectric capacitor Mar 9, 2010 Issued
Array ( [id] => 8543984 [patent_doc_number] => 08319278 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2012-11-27 [patent_title] => 'Power device structures and methods using empty space zones' [patent_app_type] => utility [patent_app_number] => 12/720856 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 61 [patent_no_of_words] => 7487 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12720856 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/720856
Power device structures and methods using empty space zones Mar 9, 2010 Issued
Array ( [id] => 9750241 [patent_doc_number] => 08841723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-23 [patent_title] => 'LDMOS device having increased punch-through voltage and method for making same' [patent_app_type] => utility [patent_app_number] => 12/720834 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2578 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12720834 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/720834
LDMOS device having increased punch-through voltage and method for making same Mar 9, 2010 Issued
Array ( [id] => 6518905 [patent_doc_number] => 20100230782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-16 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/721151 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5328 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0230/20100230782.pdf [firstpage_image] =>[orig_patent_app_number] => 12721151 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721151
Semiconductor device Mar 9, 2010 Issued
Array ( [id] => 9711459 [patent_doc_number] => 08836035 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-09-16 [patent_title] => 'Method and apparatus for reducing gate resistance' [patent_app_type] => utility [patent_app_number] => 12/721159 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5962 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12721159 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721159
Method and apparatus for reducing gate resistance Mar 9, 2010 Issued
Array ( [id] => 6010583 [patent_doc_number] => 20110220980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-09-15 [patent_title] => 'MEMORY HAVING BURIED DIGIT LINES AND METHODS OF MAKING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/721404 [patent_app_country] => US [patent_app_date] => 2010-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5459 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0220/20110220980.pdf [firstpage_image] =>[orig_patent_app_number] => 12721404 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/721404
Memory having buried digit lines and methods of making the same Mar 9, 2010 Issued
Array ( [id] => 6320457 [patent_doc_number] => 20100244002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-30 [patent_title] => 'ORGANIC LIGHT-EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 12/717441 [patent_app_country] => US [patent_app_date] => 2010-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2765 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0244/20100244002.pdf [firstpage_image] =>[orig_patent_app_number] => 12717441 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/717441
Organic light-emitting diode Mar 3, 2010 Issued
Array ( [id] => 6105751 [patent_doc_number] => 20110186804 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'NANOSCALE CHEMICAL TEMPLATING WITH OXYGEN REACTIVE MATERIALS' [patent_app_type] => utility [patent_app_number] => 12/696417 [patent_app_country] => US [patent_app_date] => 2010-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8856 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0186/20110186804.pdf [firstpage_image] =>[orig_patent_app_number] => 12696417 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/696417
Nanoscale chemical templating with oxygen reactive materials Jan 28, 2010 Issued
Array ( [id] => 8591822 [patent_doc_number] => 08349698 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-01-08 [patent_title] => 'Integrated semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/695354 [patent_app_country] => US [patent_app_date] => 2010-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7877 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12695354 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/695354
Integrated semiconductor device and method of manufacturing the same Jan 27, 2010 Issued
Array ( [id] => 4604696 [patent_doc_number] => 07985676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-26 [patent_title] => 'Method of making a contact in a semiconductor device' [patent_app_type] => utility [patent_app_number] => 12/693231 [patent_app_country] => US [patent_app_date] => 2010-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 21 [patent_no_of_words] => 4701 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/985/07985676.pdf [firstpage_image] =>[orig_patent_app_number] => 12693231 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/693231
Method of making a contact in a semiconductor device Jan 24, 2010 Issued
Menu