Search

Colleen Erin Snow

Examiner (ID: 16708, Phone: (571)272-8603 , Office: P/2899 )

Most Active Art Unit
2899
Art Unit(s)
2813, 2899
Total Applications
846
Issued Applications
638
Pending Applications
51
Abandoned Applications
177

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7314342 [patent_doc_number] => 20040222512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-11 [patent_title] => 'Method and system to manufacture stacked chip devices' [patent_app_type] => new [patent_app_number] => 10/869176 [patent_app_country] => US [patent_app_date] => 2004-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1621 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 3 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0222/20040222512.pdf [firstpage_image] =>[orig_patent_app_number] => 10869176 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869176
Method and system to manufacture stacked chip devices Jun 15, 2004 Abandoned
Array ( [id] => 553144 [patent_doc_number] => 07160774 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-01-09 [patent_title] => 'Method of forming polysilicon layers in non-volatile memory' [patent_app_type] => utility [patent_app_number] => 10/870285 [patent_app_country] => US [patent_app_date] => 2004-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 3989 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/160/07160774.pdf [firstpage_image] =>[orig_patent_app_number] => 10870285 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/870285
Method of forming polysilicon layers in non-volatile memory Jun 15, 2004 Issued
Array ( [id] => 7997223 [patent_doc_number] => 08080459 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-12-20 [patent_title] => 'Self aligned contact in a semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 10/869382 [patent_app_country] => US [patent_app_date] => 2004-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 15 [patent_no_of_words] => 4702 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/080/08080459.pdf [firstpage_image] =>[orig_patent_app_number] => 10869382 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/869382
Self aligned contact in a semiconductor device and method of fabricating the same Jun 14, 2004 Issued
Array ( [id] => 7228824 [patent_doc_number] => 20050269680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-08 [patent_title] => 'System-in-package (SIP) structure and fabrication thereof' [patent_app_type] => utility [patent_app_number] => 10/864116 [patent_app_country] => US [patent_app_date] => 2004-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2921 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0269/20050269680.pdf [firstpage_image] =>[orig_patent_app_number] => 10864116 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/864116
System-in-package (SIP) structure and fabrication thereof Jun 7, 2004 Abandoned
Array ( [id] => 7025606 [patent_doc_number] => 20050020000 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Transistor manufacturing method, electro-optic device and electronic instrument' [patent_app_type] => utility [patent_app_number] => 10/859126 [patent_app_country] => US [patent_app_date] => 2004-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6820 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0020/20050020000.pdf [firstpage_image] =>[orig_patent_app_number] => 10859126 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/859126
Transistor manufacturing method, electro-optic device and electronic instrument Jun 2, 2004 Abandoned
Array ( [id] => 7197404 [patent_doc_number] => 20050164511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-07-28 [patent_title] => 'Method and system for etching a high-k dielectric material' [patent_app_type] => utility [patent_app_number] => 10/852685 [patent_app_country] => US [patent_app_date] => 2004-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6485 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0164/20050164511.pdf [firstpage_image] =>[orig_patent_app_number] => 10852685 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/852685
Method and system for etching a high-k dielectric material May 24, 2004 Issued
Array ( [id] => 476566 [patent_doc_number] => 07227228 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-06-05 [patent_title] => 'Silicon on insulator device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/850106 [patent_app_country] => US [patent_app_date] => 2004-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 4259 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/227/07227228.pdf [firstpage_image] =>[orig_patent_app_number] => 10850106 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/850106
Silicon on insulator device and method of manufacturing the same May 20, 2004 Issued
Array ( [id] => 7429324 [patent_doc_number] => 20040209455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-21 [patent_title] => 'Insulating film of semiconductor device and coating solution for forming insulating film and method of manufacturing insulating film' [patent_app_type] => new [patent_app_number] => 10/848154 [patent_app_country] => US [patent_app_date] => 2004-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6376 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0209/20040209455.pdf [firstpage_image] =>[orig_patent_app_number] => 10848154 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/848154
Insulating film of semiconductor device and coating solution for forming insulating film and method of manufacturing insulating film May 18, 2004 Abandoned
Array ( [id] => 7206229 [patent_doc_number] => 20050258492 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-24 [patent_title] => 'Low-voltage single-layer polysilicon eeprom memory cell' [patent_app_type] => utility [patent_app_number] => 10/848763 [patent_app_country] => US [patent_app_date] => 2004-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2854 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0258/20050258492.pdf [firstpage_image] =>[orig_patent_app_number] => 10848763 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/848763
Low-voltage single-layer polysilicon eeprom memory cell May 17, 2004 Issued
Array ( [id] => 650967 [patent_doc_number] => 07112544 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2006-09-26 [patent_title] => 'Method of atomic layer deposition on plural semiconductor substrates simultaneously' [patent_app_type] => utility [patent_app_number] => 10/846425 [patent_app_country] => US [patent_app_date] => 2004-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 6433 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/112/07112544.pdf [firstpage_image] =>[orig_patent_app_number] => 10846425 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/846425
Method of atomic layer deposition on plural semiconductor substrates simultaneously May 12, 2004 Issued
Array ( [id] => 7067013 [patent_doc_number] => 20050242395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-03 [patent_title] => 'FinFET transistor device on SOI and method of fabrication' [patent_app_type] => utility [patent_app_number] => 10/836295 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5889 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0242/20050242395.pdf [firstpage_image] =>[orig_patent_app_number] => 10836295 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/836295
FinFET transistor device on SOI and method of fabrication Apr 29, 2004 Issued
Array ( [id] => 7174179 [patent_doc_number] => 20040201068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Process for producing thin film transistor' [patent_app_type] => new [patent_app_number] => 10/836036 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 3644 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20040201068.pdf [firstpage_image] =>[orig_patent_app_number] => 10836036 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/836036
Process for producing thin film transistor Apr 29, 2004 Abandoned
Array ( [id] => 7275836 [patent_doc_number] => 20040235287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-11-25 [patent_title] => 'Method of manufacturing semiconductor package and method of manufacturing semiconductor device' [patent_app_type] => new [patent_app_number] => 10/834975 [patent_app_country] => US [patent_app_date] => 2004-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3638 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0235/20040235287.pdf [firstpage_image] =>[orig_patent_app_number] => 10834975 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/834975
Method of manufacturing semiconductor package and method of manufacturing semiconductor device Apr 29, 2004 Abandoned
Array ( [id] => 7173900 [patent_doc_number] => 20040201015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-14 [patent_title] => 'Polythiophenes and devices thereof' [patent_app_type] => new [patent_app_number] => 10/832504 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6596 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 7 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0201/20040201015.pdf [firstpage_image] =>[orig_patent_app_number] => 10832504 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/832504
Polythiophenes and devices thereof Apr 26, 2004 Issued
Array ( [id] => 7441044 [patent_doc_number] => 20040195566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Polythiophenes and devices thereof' [patent_app_type] => new [patent_app_number] => 10/832503 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6592 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 8 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20040195566.pdf [firstpage_image] =>[orig_patent_app_number] => 10832503 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/832503
Polythiophenes and devices thereof Apr 26, 2004 Issued
Array ( [id] => 7442297 [patent_doc_number] => 20040195689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-10-07 [patent_title] => 'Butting contact structure and method incorporating with a silicide inserted between a contact region and a conductor for a small contact window' [patent_app_type] => new [patent_app_number] => 10/832303 [patent_app_country] => US [patent_app_date] => 2004-04-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3235 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0195/20040195689.pdf [firstpage_image] =>[orig_patent_app_number] => 10832303 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/832303
Butting contact structure and method incorporating with a silicide inserted between a contact region and a conductor for a small contact window Apr 26, 2004 Abandoned
Array ( [id] => 690413 [patent_doc_number] => 07074654 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-07-11 [patent_title] => 'Tape supported memory card leadframe structure' [patent_app_type] => utility [patent_app_number] => 10/828616 [patent_app_country] => US [patent_app_date] => 2004-04-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 6623 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/074/07074654.pdf [firstpage_image] =>[orig_patent_app_number] => 10828616 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/828616
Tape supported memory card leadframe structure Apr 20, 2004 Issued
Array ( [id] => 7264030 [patent_doc_number] => 20040241918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-12-02 [patent_title] => 'Method for making thin-film semiconductor device, thin-film semiconductor device, method for making electro-optic apparatus, electro-optic apparatus, and electronic apparatuses' [patent_app_type] => new [patent_app_number] => 10/826366 [patent_app_country] => US [patent_app_date] => 2004-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8558 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20040241918.pdf [firstpage_image] =>[orig_patent_app_number] => 10826366 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/826366
Method for making thin-film semiconductor device, thin-film semiconductor device, method for making electro-optic apparatus, electro-optic apparatus, and electronic apparatuses Apr 18, 2004 Abandoned
Array ( [id] => 521663 [patent_doc_number] => 07186624 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-03-06 [patent_title] => 'Bipolar transistor with lattice matched base layer' [patent_app_type] => utility [patent_app_number] => 10/824697 [patent_app_country] => US [patent_app_date] => 2004-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5631 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/186/07186624.pdf [firstpage_image] =>[orig_patent_app_number] => 10824697 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/824697
Bipolar transistor with lattice matched base layer Apr 13, 2004 Issued
Array ( [id] => 5675545 [patent_doc_number] => 20060180900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-08-17 [patent_title] => 'Organo-silsesquioxane polymers for forming low-k dielectrics' [patent_app_type] => utility [patent_app_number] => 10/552663 [patent_app_country] => US [patent_app_date] => 2004-04-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8486 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20060180900.pdf [firstpage_image] =>[orig_patent_app_number] => 10552663 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/552663
Organo-silsesquioxane polymers for forming low-k dielectrics Apr 12, 2004 Issued
Menu